CS61880 datasheet(35/70 Pages) CIRRUS

35 / 70 page

CS61880

DS450PP3

14. REGISTER DESCRIPTIONS

14.1 Revision/IDcode Register (00h)

14.2 Analog Loopback Register (01h)

14.3 Remote Loopback Register (02h)

14.4 TAOS Enable Register (03h)

14.5 LOS Status Register (04h)

14.6 DFM Status Register (05h)

BIT

NAME

Description

[7:4]

REVI 7-4

Bits [7:4] are taken from the least-significant nibble of the Device IDCode, which are 0000.

(Refer to Device ID Register (IDR) (See Section 16.3 on page 47).

[3:0]

REVI 3-0

Bits [3:0] are the revision bits from the JTAG IDCODE register, CS61880 Revision A = 0000.

These bits are subject to change with the revision of the device (Refer to Device ID Register

(IDR) (See Section 16.3 on page 47).

BIT

NAME

Description

[7:0]

ALBK 7-0

Enables analog loopbacks. A “1” in bit n enables the loopback for channel n. Refer to Analog

Loopback (See Section 12.2 on page 29) for a complete explanation. Register bits default

to 00h after power-up or reset.

BIT

NAME

Description

[7:0]

RLBK 7-0

Enables remote loopbacks. A “1” in bit n enables the loopback for channel n. Refer to HOST

MODE (See Section 13 on page 32) for a complete explanation. Register bits default to

00h after power-up or reset.

BIT

NAME

Description

[7:0]

TAOE 7-0

A “1” in bit n of this register turns on the TAOS generator in channel n. Register bits default

to 00h after power-up or reset.

BIT

NAME

Description

[7:0]

LOSS 7-0

00h after power-up or reset.

BIT

NAME

Description

[7:0]

DFMS 7-0 Driver Failure Monitor. The DFM will set bit n to “1” when it detects a short circuit in channel

n. Register bits default to 00h after power-up or reset.

CS61880 датащи(PDF) 35 Page - Cirrus Logic

CS61880 датащи(HTML) 35 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

датащи скачать

ссылки URL