TMS29F010-12CSFML datasheet(11/36 Pages) TI

11 / 36 page

TMS29F010

131072 BY 8-BIT

FLASH MEMORY

SMJS840A – NOVEMBER 1997 – REVISED JUNE 1998

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

sector unprotect operation

Prior to the sector-unprotect operation, all sectors should be protected using the sector-protect mode. Sector

unprotect is activated when VCC = 5.0 V (and operation at TA = 25°C), W = VIH, and address pin A9 and control

pins G and E are forced to VID. Address pin A6 = VIL, and pins A7 and A12 are set to VIH. The sector-select

address pins A14, A15, and A16 can be VIL or VIH. All eight sectors are unprotected in parallel, and once the

inputs are stable, W is pulsed low for 10 ms. The unprotect operation begins on the falling edge of W and

terminates on the rising edge of W. Figure 17 shows a timing diagram of the sector-unprotect operation.

sector-unprotect verify

Verification of sector-unprotect is accomplished when VCC = 5.0 V (and operation at TA = 25°C), W = VIH,

G = VIL, E = VIL, and address pin A9 = VID, and then select the sector to be verified. Address pins A1 and A6

are set to VIH while pin A0 is set to VIL. The other address pins can be VIH or VIL. If the sector that is selected

is protected, the DQs output 01h and if the sector is not protected, the DQs output 00h.

low VCC write lockout

During power up and power down, write operations are locked out for VCC less than VLKO. If VCC < VLKO, the

command input is disabled and the device is reset to the read mode. On power up, if E = VIL, W = VIL, and

G = VIH, the device does not accept commands on the rising edge of W. The device automatically powers up

in the read mode.

glitching

Pulses of less than 5 ns (typical) on G, W, or E do not issue a write cycle.

power supply considerations

Each device should have a 0.1-

µF ceramic capacitor connected between VCC and VSS to suppress circuit noise.

Printed circuit traces to VCC should be appropriate to handle the current demand and minimize inductance.

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