M50FLW080A datasheet(27/64 Pages) STMICROELECTRONICS

27 / 64 page

M50FLW080A, M50FLW080B

Command interface

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4.5

Quadruple Byte Program command (A/A Mux interface)

The Quadruple Byte Program Command is used to program four adjacent Bytes in the

memory array at a time. The four Bytes must differ only for addresses A0 and A1.

Programming should not be attempted when VPP is not at VPPH.

Five Bus Write operations are required to issue the command. The second, third and fourth

Bus Write cycles latch the respective addresses and data of the first, second and third Bytes

in the Program/Erase Controller. The fifth Bus Write cycle latches the address and data of

the fourth Byte and starts the Program/Erase Controller. Once the command is issued,

subsequent Bus Read operations read the value in the Status Register. (See the section on

the Status Register for details on the definitions of the Status Register bits.)

During the Quadruple Byte Program operation, the memory will only accept the Read Status

Note that the Quadruple Byte Program command cannot change a bit set to ‘0’ back to ‘1’

and attempting to do so will not modify its value. One of the erase commands must be used

to set all of the bits in the block to ‘1’.

See Figure 23, for a suggested flowchart on using the Quadruple Byte Program command.

Typical Quadruple Byte Program times are given in Table 18.

4.6

Double/Quadruple Byte Program command (FWH mode)

The Double/Quadruple Byte Program Command can be used to program two/four adjacent

Bytes to the memory array at a time. The two Bytes must differ only for address A0; the four

Bytes must differ only for addresses A0 and A1.

Two Bus Write operations are required to issue the command. The second Bus Write cycle

latches the start address and two/four data Bytes and starts the Program/Erase Controller.

Once the command is issued, subsequent Bus Read operations read the contents of the

Status Register. (See the section on the Status Register for details on the definitions of the

Status Register bits.)

During the Double/Quadruple Byte Program operation the memory will only accept the Read

Status register and Program/Erase Suspend commands. All other commands are ignored.

Note that the Double/Quadruple Byte Program command cannot change a bit set to ‘0’ back

to ‘1’ and attempting to do so will not modify its value. One of the erase commands must be

used to set all of the bits in the block to ‘1’.

See Figure 22, for a suggested flowchart on using the Double/Quadruple Byte Program

command. Typical Double/Quadruple Byte Program times are given in Table 18.

M50FLW080A датащи(PDF) 27 Page - STMicroelectronics