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SCD1283 датащи(PDF) 14 Page - Intel Corporation

номер детали SCD1283
подробное описание детали  IEEE 1284-Compatible Parallel Interface
PDF  94 Pages
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производитель  INTEL [Intel Corporation]
домашняя страница  http://www.intel.com
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SCD1283 датащи(HTML) 14 Page - Intel Corporation

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CD1283 — IEEE 1284-Compatible Parallel Interface
14
Datasheet
3.2
Pin List
The following naming conventions are used in the pin-assignment tables:
(*) after a name indicates that the signal is active-low
‘I’ indicates the pin is input-only
‘O’ indicates the pin is output-only
‘I/O’ indicates the pin is bidirectional
‘OD’ indicates an open-drain output that the user must tie to VCC through a pull-up resistor
(usually about 1 k
Ω)
‘TS’ indicates tristate
‘PU’ indicates pull-up, which must also be tied to VCC through a 1-kΩ resistor (note that all
six PU pins can be wire-OR’ed through the same pull-up resistor)
‘AR’ indicates active release (pin drives high and releases to OD)
a ‘–’ indicates ascending pin numbers
a ‘:’ indicates descending pin numbers
Pin
Names
Compati-
bility
Reverse
Nibble
Mode
Reverse
Byte
Mode
ECP Mode
EPP
Mode
Inputs
A_1284
SLCTIN*
A_1284
A_1284
A_1284
nAStrb
HstBsy
AUTOFD*
HstBsy
HstBsy
HstAck
nDStrb
HstClk
STROBE*
HstClk
HstClk
HstClk
nWrite
nInit
INIT*
nInit
nInit
nRevReq
nInit
Outputs
AkDaR
q
PError
AkDaRq
AkDaRq
nAkRev
USER1
PerBsy
BUSY
PerBsy
PerBsy
PerAck
nWait
PerClk
ACK*
PerClk
PerClk
PerClk
Intr
nDatAv
FAULT*
nDatAv
nDatAv
nPerReq
USER2
XFlag
SELECT
XFlag
XFlag
XFlag
USER3
Pin Name
Type
Number
of Pins
Pin
Numbers
Reset
State
A[6:0]
I
7
84–90
BYTESWAP
I
1
82
CLK
I
1
73
CLK/2
O
1
80
n/a
CS*
I
1
78



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