LTC6955

1

Rev 0

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Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

7GHz Cumulative Phase Noise

ADF4371 Driving LTC6955

10kΩ

1pF

1pF

1nH

100Ω

100Ω

0.1µF

0.1µF

0.1µF

0.1µF

1nF

.01µF

100Ω

0.1µF

0.1µF

10pF

10pF

7.4nH

7.4nH

+

+

3.3V

+

7.00GHz

CLOCKS

6955 TA01a

LTC6955

BUFFER

3.3V

FILT

POWERED DOWN OR

ADDITIONAL CLOCKS

SEL3

SEL2

SEL1

SEL0

3.3V

/1

/1

/1

3.3V

Crystek

100MHz Ref Osc

REFP

REFN

RF8P

RF8N

ADF4371

TOTAL COMBINED

RMS JITTER = 67fs

ADF4371 RMS JITTER = 50fs

LTC6955 RMS JITTER = 45fs

EQUIVALENT ADC SNR METHOD

ADF4371

ADF4371 + LTC6955

OFFSET FREQUENCY (Hz)

1k

10k

100k

1M

10M 40M

–180

–170

–160

–150

–140

–130

–120

–110

–100

–90

–80

6955 TA01b

Generation of Multiple Low Jitter 7GHz Clocks

TYPICAL APPLICATION

FEATURES

DESCRIPTION

Ultralow Jitter, 7.5GHz,

11 Output Fanout

Buffer Family

The LTC®6955 is a high performance, ultralow jitter,

fanout clock buffer with eleven outputs. Its 4-pin parallel

control port allows for multiple output setups, enabling

any number between three and eleven outputs, as well as

a complete shutdown. The parallel port also provides the

ability to invert the output polarity of alternating outputs,

simplifying designs with top and bottom board routing.

Each of the CML outputs can run from DC to 7.5GHz.

The LTC6955-1 replaces one output buffer with a divide-

by-2 frequency divider, allowing it to drive Analog Devices

LTC6952 or LTC6953 to generate JESD204B subclass 1

SYSREF signals. These SYSREFs can pair with ultralow

jitter device clocks from the LTC6955-1, which can run

at frequencies up to 7.5GHz.

APPLICATIONS

n

LTC6955: 11 Output Buffer

n

LTC6955-1: 10 Buffered Outputs and One ÷2 Output

n

Additive Output Jitter ~45fs RMS (ADC SNR Method)

n

Additive Output Jitter < 5fs RMS

(Integration BW = 12kHz to 20MHz, f = 7.5GHz)

n

Eleven Ultralow Noise CML Outputs

n

Parallel Control for Multiple Output Configurations

n

–40°C to 125°C Operating Junction Temperature

Range

n

High Performance Data Converter Clocking

n

SONET, Fibre Channel, GigE Clock Distribution

n

Low Skew and Jitter Clock and Data Fanout

n

Wireless and Wired Communications

n

Single-Ended to Differential Conversion

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by U.S. patents, including 8319551 and 8819472.