ISL97635A

FN6564 Rev.3.00

Page 19 of 29

Sep 26, 2017

PWM Brightness Control Register (0x00)

The Brightness control resolution has 256 steps of PWM duty

cycle adjustment. The bit assignment is shown in Figure 24. All of

the bits in this Brightness Control Register can be read or write.

Step 0 corresponds to the minimum step where the current is

less than 10µA. Step1 to step 255 represent the linear steps

between 0.39% and 100% duty cycle with approximately 0.39%

duty cycle adjustment per step.

• An SMBus Write Byte cycle to register 0x00 sets the PWM

brightness level only if the backlight controller is in SMBus

mode (see Table 3 Operating Modes selected by Device Control

Register Bits 1 and 2).

• An SMBus Read Byte cycle to register 0x00 returns the

programmed PWM brightness level regardless of the value of

PWM_SEL.

• An SMBus setting of 0xFF for register 0x00 sets the backlight

controller to the maximum brightness.

• An SMBus setting of 0x00 for register 0x00 sets the backlight

controller to the minimum brightness output in which the LED

current is guaranteed to be less than 10µA.

• Default value for register 0x00 is 0xFF.

Device Control Register (0x01)

This register has two bits that control the operating mode of the

backlight controller and a single bit that controls the BL ON/OFF

state. The remaining bits are reserved. The bit assignment is

shown in Figure 25. All other bits in the Device Control Register

will read as low unless otherwise written. Bits 7 and 6 are not

implemented and will always read low.

0x08

Configuration Register

VSC[1..0] = Short-circuit thresholds selection

FSW[2] = Switching frequencies selection

0x09

Output Channel Mask / Fault

Readout Register

CH[5..0] = Output Channel Read and Write. In Write, 1 = Channel Enabled, 0 = Channel Disabled. In

Read, 1 = Channel OK, 0 = Channel Not OK/Channel disabled

TABLE 2B. DATA BIT DESCRIPTIONS (Continued)

ADDRESS

REGISTER

DATA BIT DESCRIPTIONS

VSC1

VSC0

OPERATION

0X

No VSC error detection

1

0

VSC = 3.1V ±15%

1

1

VSC = 8V ±15%

FSW

OPERATION

TABLE 3. OPERATING MODES SELECTED BY DEVICE CONTROL

REGISTER BITS 1 AND 2

PWM_MD

PWM_SEL

MODE

X1

PWMI Mode

10

SMBus Mode

0

0

SMBus and PWMI Mode with DPST