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ISL97635A датащи(PDF) 16 Page - Renesas Technology Corp |
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ISL97635A датащи(HTML) 16 Page - Renesas Technology Corp |
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16 / 29 page ![]() ISL97635A FN6564 Rev.3.00 Page 16 of 29 Sep 26, 2017 6CH0 LED Open Circuit but has paralleled Zener Upper OTP triggered but VIIN0 < VSC CH0 goes off until chip cooled and then comes back on with current reduced to 76%. Further OTP triggers result in reduction to 53%, then 30%. Thermal event reported in Fault/Status Register. Same as CH0 VF of CH0 7CH0 LED Open Circuit but has paralleled Zener Upper OTP not triggered but VIIN0 > VSC CH0 OFF CH1 through CH5 Normal Highest VF of CH1 through CH5 Upper OTP not triggered but VIINx > VSC CH0 remains ON and has highest VF, thus VOUT increases. VOUT increases then CH-X switches OFF. This is an unwanted shut off and can be prevented by setting OVP and/or VSC at an appropriate level. VF of CH0 8 Channel-to-Channel VF too high Lower OTP triggered but VIINx < VSC Any channel at below 50% of the target current will fault out after 400µs. Remaining channels driven with normal current. Highest VF of CH0 through CH5 9 Channel-to-Channel VF too high Upper OTP triggered but VIINx < VSC All channels switched off until chip cooled and then comes back on with current reduced to 76%. Further OTP triggers result in reduction to 53%, then 30%. Thermal event reported in Fault/Status Register. Highest VF of CH0 through CH5 10 Output LED stack voltage too high VOUT > VOVP Driven with normal current. Any channel that is below 50% of the target current will time-out after 6ms. Highest VF of CH0 through CH5 11 VOUT/LX shorted to GND LX current and timing are monitored. OVP pin monitored for excursions below 20% of OVP threshold Fault switch disabled and system shutdown until fault goes away, VOUT is checked at startup with a low current from LX to check for presence of short before the fault switch is enabled. TABLE 1. PROTECTIONS TABLE (Continued) CASE FAILURE MODE DETECTION MODE FAILED CHANNEL ACTION GOOD CHANNELS ACTION VOUT REGULATED BY FIGURE 20. SMBUS INTERFACE VIH VIL VIH VIL tR tLOW tHD:STA tHD:DAT tF tHIGH tSU:DAT tSU:STA S S P P tSU:STO SMBDAT SMBCLK NOTES: SMBus Description S = start condition P = stop condition A = acknowledge A = not acknowledge R/W = read enable at high; write enable at low tBUF |
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