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MP2624GL датащи(PDF) 26 Page - Monolithic Power Systems |
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MP2624GL датащи(HTML) 26 Page - Monolithic Power Systems |
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26 / 45 page ![]() MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG MP2624 Rev.1.05 www.MonolithicPower.com 26 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. POR I 2C W rite? H ost M ode Start w atchdog tim er H ost Program s R egisters D efault M ode R eset w atchdog tim er R eset R egister Re se t RE G0 1 Bit [6] ? W a tchd og Tim e r Expire d? Yes No Yes No V IN>V IN_UVLO or V BATT>V BATT_UVLO S leep C om parator A c tiv e , B attery FE T driv er pow er up Yes No Yes No Figure 12: Host Mode and Default Mode Battery Shipping Mode Write 1 to REG07 Bit[5] turns off the battery FET immediately when in battery discharge mode. Write 0 to REG07 Bit[5] turns on the battery FET again. In applications where the battery is not removable, it’s essential to disconnect the battery from the system to allow the system power reset. The MP2624 has a dedicated DISC pin to cut off the path from the battery to the system when the host has lost control. Once the logic at DISC is set to low for more than 8 seconds, the battery is disconnected from the system by turning off the battery FET as the battery shipping mode. When the DISC is pulled to logic high and logic low ang keeps the low period over 0.5s, the IC exit the shipping mode and the BATT FET is turned on again. This control is shown in Figure 13. Figure 13: DISC Control Function |
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