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MP2624GL датащи(PDF) 18 Page - Monolithic Power Systems |
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MP2624GL датащи(HTML) 18 Page - Monolithic Power Systems |
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18 / 45 page ![]() MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG MP2624 Rev.1.05 www.MonolithicPower.com 18 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Battery Floating Detection The MP2624 is capable of detecting whether a battery is connected or not. The following conditions initiate battery float detection: Charging is enabled. Auto-recharge is triggered. Battery OVP recovery. Before a charging cycle is initiated, the MP2624 will implement battery floating detection (see Figure 5). Under this condition, the detection block sinks a 3mA current for 1.5 seconds to check if VBATT is lower than 2.1V. If VBATT is higher than 2.1V, the battery present will be detected. Otherwise, the MP2624 will continue to source a 3mA current and start a 1 second timer to check when VBATT exceeds 3.6V. If VBATT is still lower than 3.6V when the 1 second timer expires, the battery present is asserted. The system regulation voltage is set to Max (VSYS_MIN, VBATT) + ∆V, and the charging begins to soft start. Before the 1 second timer expires (as soon as VBATT rises up to 3.6V), the 3mA sink current source will be disabled, and the battery absent is detected. In this case, the charging is disabled, and the system regulation voltage is set to VBATT_FULL + ∆V. Battery floating detection flow is shown in Figure 6. 2.1V 3.6V 4.2V 1s VBATT VSYS Battery Always Absent 1.5s (a) Charging Start-Up with Battery Absent 2.1V 3.6V 4.2V 1s VBATT VSYS 1.5s Battery Always Present (b) Charging Start-Up with Battery Present (c) Remove Battery during Charging Figure 5: Battery Float Detection Examples System Over-Voltage Protection The MP2624 always monitors the voltage at SYS. When system over-voltage is detected (VSYS > VBATT_FULL+ ∆V +100mV), the DC/DC converter is turned off, and the system is powered by the battery via the battery FET. ∆V can be set to 50mV or 100mV via the I2C register REG01 Bit[0]. During heavy system load transient, System OVP often happens when load transient from heavy to light. The timer is suspend when system OVP, so the timer may transfer between normal and suspend frequently, the timer counter will receive a fault timer clock signal, then fault timer out may happen under this condition. |
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