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ATECC508A датащи(PDF) 60 Page - Microchip Technology

номер детали ATECC508A
подробное описание детали  Cryptographic Co-processor with Secure Hardware-Based Key Storage
PDF  109 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATECC508A датащи(HTML) 60 Page - Microchip Technology

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Block 0
Block 1
Block 2
Block 3
Slot
Address
Size
Address
Size
Address
Size
Address
Size
14
0x0070
32
0x0170
32
0x0270
8
15
0x0078
32
0x0178
32
0x0278
8
Note: 
To complete a four byte read of the 53rd through 56th byte of Slot 9, the word address would be:
•
The 53rd byte is the 21st byte in Block 1 (53 divided by 32 is 1, 53 minus 32 is 21).
•
The 21st byte is located at byte offset 0x14, which is at word offset 0x05 (0x14 divided by 4 is
0x05).
•
Per Table 9-6, the address parameter to the Read command is 000000 01 0 1001 101 or 0x014.
000000 01 0 1001 101
0
1
4
D
Word Offset
Slot Number
Unused
Block Number
Unused
9.1.5
Zone Encoding
The value in Param1 controls which zone the command accesses. See Section Configuration Zone
Locking to obtain more information on what controls the locked and unlocked states for each zone. All
other zone values are reserved and should not be used.
Table 9-9. Zone Encoding (Param1)
Zone
Param1
Value
Size
Read
Write
Config
0
1024 bits
128 bytes
4 blocks
Always available.
Partially, when unlocked.
Never when locked.
Never encrypted.
OTP
1
512 bits
64 bytes
2 blocks
Never when unlocked.
Always when locked. See
Section EEPROM One Time
Programmable (OTP) Zone.
All writeable when unlocked using Write.
When locked, write permissions depend on
OTPmode. See Section EEPROM One Time
Programmable (OTP) Zone.
Data
2
9664 bits
1208 bytes
16 Slots
Never when unlocked; otherwise,
controlled by IsSecret and
EncryptRead.
All writeable when unlocked.
When locked, writes controlled by
WriteConfig.
9.1.6
Watchdog Fail-Safe
After the ATECC508A receives a Wake token, a watchdog counter starts within the device. After
tWATCHDOG, the device enters sleep mode regardless of whether an I/O transmission or command
ATECC508A
Security Commands
© 2017 Microchip Technology Inc.
Datasheet Complete
DS20005927A-page 60



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