ATECC508A datasheet(37/109 Pages) MICROCHIP

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Single-Wire Interface

In this mode, communications to and from the ATECC508A take place over SDA, a single

asynchronously timed wire. The SCL pin is not used as part of the communications channel. Instead, the

SCL pin functions as a GPIO pin.

Note: The sleep current specification values are guaranteed only if SCL pin is held low or left

unconnected.

The overall communications structure is a hierarchical format:

•

Tokens I/O Tokens implement a single data bit transmitted on the bus, or the wake-up event.

•

Flags Flags consist of eight tokens (bits) that convey the direction and meaning of the next group

of bits (if any) that may be transmitted.

•

Groups Groups of data follow the command and transmit flags. They incorporate both a byte count

and a checksum to ensure proper data transmission.

•

Packets Packets of bytes form the core of the group (minus the byte count and CRC). They are

either the input or output parameters of a CryptoAuthentication command or status

information from the ATECC508A.

See the Microchip website for the appropriate application notes for more detail on how to use any

microprocessor to easily generate the signaling necessary to send these elements to the device,

including C source code libraries. Also see Section Wiring Configuration for Single-Wire Interface for

more information about how to connect the device in the Single-Wire Interface mode.

5.1

I/O Tokens

There are a number of I/O tokens, which may be transmitted over the Single-Wire Interface:

•

Input (to the ATECC508A):

–

Wake: wake the device up from either the sleep or idle modes, or reset the I/O interface.

–

Zero: send a single bit from the system to the device with a value of zero.

–

One: send a single bit from the system to the device with a value of one.

•

Output (from the ATECC508A):

–

ZeroOut: send a single bit from the device to the system with a value of zero.

–

OneOut: send a single bit from the device to the system with a value of one.

The waveforms are the same in either direction, however, there are some differences in timing based

upon the expectation that the host has a very accurate and consistent clock while the ATECC508A has

significant part-to-part variability in its internal clock generator due to normal manufacturing and

environmental fluctuations.

The bit timings are designed to permit a standard UART running at 230.4 Kbaud to transmit and receive

the tokens efficiently. Each byte transmitted or received by the UART corresponds to a single bit received

or transmitted by the device.

The Wake token is special since it requires an extra long low pulse on the SDA pin, which cannot be

confused with the shorter low pulses that occur during a data token (i.e. Zero, One, ZeroOut, or OneOut).

Devices that are either in the idle or sleep mode will ignore all data tokens until they receive a legal wake

token. If the processor is out of synchronization with the ATECC508A, it can send an additional Wake

token to the device, which will reset the I/O channel hardware on the device.

ATECC508A

Single-Wire Interface

Datasheet Complete

DS20005927A-page 37

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