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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LC823450 датащи(PDF) 31 Page - ON Semiconductor |
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LC823450 датащи(HTML) 31 Page - ON Semiconductor |
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31 / 112 page  LC823450 www.onsemi.com 31 Boot Port Some ports are used in internal ROM code while booting as below. • EXTINT2E(GPIO2E): OUT for power supply control • EXTINT2F(GPIO2F): OUT for indicating status of boot, start of USB connection and USB disconnection, error status by Low/High of this port. • Use SDCMD1, SDAT1[3:0], SDCLK1 as SD1. SDCD1 and SDWP1 are not used. Port function switch is processed during write from SD1. • SPI Boot/SPI All Erase is processed by using 4 ports SCK1, QSCS, SDO1,SDI1. SHOLD1 and SWP1 are not used. • QSPI Boot/QSPI All Erase is processed by using SCK1, QSCS, SDO1, SDI1, SHOLD1, SWP1. • External ROM Boot is processed by using NCS0 and external memory controller ports. GPIO2E is not used. • In case of External I/F ports Hi−z mode, external memory interface ports such as NCS0, NCS1 and external memory controller ports is used. GPIO2E is used as input port. Table 12. PORTS USED DURING IPL IPL Mode Ports Used (Note 16) Physical Boot USB P2E(power supply control), P2F(status monitoring) Physical Boot SD P2E(power supply control), P2F(status monitoring) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) User Area Boot USB P2E(power supply control), P2F(status monitoring) User Area Boot SD P2E(power supply control), P2F(status monitoring) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) SPI Boot USB P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) SPI Boot SD P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) QSPI Boot USB P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P011(SWP1) P12(SHOLD1) P22(SDCLK1) P23(SDCMD1) P24(SDDATA10) P25(SDDATA11) P26(SDDATA12) P27(SDDATA13) User Area Delete P2E(power supply control), P2F(status monitoring) Partition Delete P2E(power supply control), P2F(status monitoring) SPI Erase P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SPIOUT) P0E(SDI1) SDCH0 All Erase P2E(power supply control), P2F(status monitoring) QSPI All Erase P2E(power supply control), P2F(status monitoring) P0D(SCK1) P03(QSCS) P0F(SDO1) P0E(SDI1) P11(SWP1) P12(SHOLD1) External ROM Boot P06(NCS0) P17(NRD) P30(NWRENWRL) P31(NHBNWRH) P16(NLBEXA0) P32(EXA01) P33(EXA02) P34(EXA03) P35(EXA06) P36(EXA05) P37(EXA06) P38(EXA07) P39(EXA08) P3A(EXA09) P3B(EXA10) P3C(EXA11) P3D(EXA12) P3E(EXA13) P3F(EXA14) P40(EXA15) P41(EXA16) P42(EXA17) P43(EXA18) P44(EXA19) P45(EXA20) P46(EXD00) P47(EXD01) P48(EXD02) P49(EXD03) P4A(EXD04) P4B(EXD05) P4C(EXD06) P4D(EXD07) P4E(EXD08) P4F(EXD09) P50(EXD10) P51(EXD11) P52(EXD12) P53(EXD13) P54(EXD14) P55(EXD15) HI-z SDCLK0 Hi-z state 16. In this table “Pxx” means “GPIOxx”. For example “P2E” means “GPIO2E”. |
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