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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LC823450 датащи(PDF) 73 Page - ON Semiconductor |
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LC823450 датащи(HTML) 73 Page - ON Semiconductor |
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73 / 112 page  LC823450 www.onsemi.com 73 SDRAM Interface • [condition] VDD1 = 0.93 V to 1.27 V, VDD2 = 1.7 V to 1.95 V or 2.7 V to 3.6 V External load 5 to 15 pF Figure 19. AC Characteristics − SDRAM Interface Clock Input (to LSI) Output Address (from LSI) Output Others (from LSI) tISU tIH tADLY tODLY • [applied pin] ♦ Clock : SDRCLK ♦ Output : SDRCKE, SDRCS, SDRWE, SDRCAS, SDRRAS, SDRDQM[1:0], SDRADDR[10:0], SDRBA[1:0], SDRDATA[15:0] output ♦ Input : SDRDATA[15:0] input Table 36. I/O Voltage (VDD2) 2.7 V to 3.6 V 1.7 V to 1.95 V Unit External Load 5 pF to 15 pF I/O Drivability 4 mA 8 mA Item Symbol Min Max Min Max Clock frequency fclk − 65 − 54 MHz Input set−up time tISU 8.3 − 9.9 − ns Input hold−up time tIH −1.9 − −2.7 − ns Address Delay time tADLY 1.0 21.7 0.7 27.3 ns Output Delay time tODLY −2.9 3.2 −3.3 4.9 ns 55. Address becomes valid 1 cycle before the timing when CS becomes active. Address is stable while CS is active. |
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