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LC823450 датащи(PDF) 103 Page - ON Semiconductor |
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LC823450 датащи(HTML) 103 Page - ON Semiconductor |
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103 / 112 page ![]() LC823450 www.onsemi.com 103 INTERNAL POWER DOMAIN CONTROL This LSI has eight power isolated region of internal core for leakage current reduction, these can be power supply OFF separately. Power isolated region ISOLATED−X (X means one of the eight region ISOLATED A to I. ISOLATED F doesn’t exist) described in Figure 37. Power ON / OFF for each power domain is controlled by the appropriate bit of System Controller of power control register (LSISTBY). However, to control the power control register (LSISTBY), also control ISOLATION control register (ISOCNT) as necessary. Please refer to the ProgrammersModel_SystemController for details. Each power isolation region and its contents, the flag of the corresponding power control register (LSISTBY) and power control register (LSISTBY) is as follows. Table 59. Name Content LSISTBY ISOCNT ISOLATED−A Audio Block Bit0 STBYA Bit0 ISOCNTA ISOLATED−B Internal SRAM(seg 3/4/5) Bit0 STBYB Bit0 ISOCNTB ISOLATED−C Internal SRAM(seg 6/7/8) Bit0 STBYC Bit0 ISOCNTC ISOLATED−D Internal SRAM(seg 9) 220KB LPDSP32 ROM Bit0 STBYD Bit0 ISOCNTD ISOLATED−E USB 2.0 Holt Controller SRAM for USB Bit0 STBYE Bit0 ISOCNTE ISOLATED−G Cache for S−Flash I/F Bit0 STBYG Bit0 ISOCNTG ISOLATED−H SD Card I/F Memory Stick I/F Bit0 STBYH Bit0 ISOCNTH ISOLATED−I Internal ROM 256KB Bit0 STBYI Bit0 ISOCNTI POWER SUPPLY SEQUENCE Background The basic sequence of power on/off of power supply is the following order. (Simultaneous power on/off is acceptable) • Power on Vdd*(Internal) → Vdd*(IO) → Vsig(Signal) • Power off Vsig(Signal) → Vdd*(IO) → Vdd*(Internal) Power on of Vdd*(IO) while Vdd *(Internal) are power off might generate the glitch on IO signals and flow of through current. To avoid it, the sequence mentioned above is recommended as the basic sequence. Recommendation Following sequence is recommended (Simultaneous power on/off is acceptable). • Power on 1 → 2 → Vsig(signal) • Power off Vsig(signal) → 2 → 1 NOTE: The sequence of 1(Internal) → 2(IO) causes LSI hard reset and prevent from making IO glitch 3(RTC) has dedicated power supply and sequence which is described on the following section. Power Supply Group 1. Internal core, analog power supply (1V power supply) Vdd1, VddXT1, AVddPLL1, AVddPLL2, AVddUSBPHY1, DVddUSBPHY1 2. External IO power supply (3V power supply) Vdd2, VddSD0, VddSD1, VddSD2, VddQSPI AVddUSBPHY2, AVddADC, AVddPLL3 AVddDAMPL, AVddDAMPR 3. RTC power supply VddRTC (Dedicated power supply and sequence is dedicated power on/off sequence is described in the following sections) RTC Terminal Control Sequence A power supply sequence and other terminal control sequence of RTC are described as follows. |
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