AD9993BBCZ datasheet(34/57 Pages) AD

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Data Sheet

AD9993

Rev. A | Page 33 of 56

STROBE LANE CONTROL REGISTER

Address: 0x012, Reset: 0x00, Name: STROBE_CTRL

Table 17. Bit Descriptions for STROBE_CTRL

Bits

Bit Name

Description

Reset

Access

[7:4]

STROBE_SAMPLE_RATE

Sample rate of strobe output.

0x0

0 = 1/1 of data sample rate.

1 = 1/2 of data sample rate.

2 = 1/4 of data sample rate.

3 = 1/8 of data sample rate.

4 = 1/16 of data sample rate.

5 = 1/32 of data sample rate.

6 = 1/64 of data sample rate.

7 = 1/128 of data sample rate.

8 = 1/256 of data sample rate.

Needs at least one ADC channel working.

STROBE_DUTY_CYCLE_EN

Enable 50% duty cycle of strobe lane. Needs at least one ADC channel

working.

0x0

OUTPUT MODE REGISTER

Address: 0x013, Reset: 0x11, Name: FLEX_OUTPUT_MODE

Table 18. Bit Descriptions for FLEX_OUTPUT_MODE

Bits

Bit Name

Description

Reset

Access

DP_OUT_DATA_EN_N

Digital datapath output enable (active low) (ADC indexed).

0x1

0 = digital output from ADC is enabled.

1 = digital output from ADC is disabled.

DP_OUT_DATA_INV

Digital datapath output invert (ADC indexed).

0x0

0 = output from ADC is not inverted.

1 = output from ADC is inverted.

[1:0]

DP_OUT_DFS

Digital datapath output data format select (DFS) (ADC indexed).

0x1

00 = offset binary.

01 = twos complement.

10 = gray code.

11 = reserved.

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