AD9993BBCZ datasheet(31/57 Pages) AD

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AD9993

Data Sheet

Rev. A | Page 30 of 56

SPI CONFIGURATION REGISTER

Address: 0x000, Reset: 0x18, Name: SPI_CONFIG

Table 11. Bit Descriptions for SPI_CONFIG

Bits

Bit Name

Description

Reset

Access

SPI_LSB_FIRST2

SPI least significant bit first.

0x0

1 = least significant bit shifted first for all SPI operations. On multibyte SPI

operations, addressing increments automatically.

0 = most significant bit shifted first for all SPI operations. On multibyte SPI

operations, addressing decrements automatically.

This bit must be accessed with all devices enabled and is not reset by

setting the SPI_SOFT_RESET1 or SPI_SOFT_RESET2 bit.

SPI_SOFT_RESET2

Self Clearing Soft Reset 1. Reset the SPI registers (self clearing).

0x0

This bit must be accessed with all devices enabled.

[4:3]

SPI_ADDR_MODE

13-bit addressing mode always enabled.

0x3

SPI_SOFT_RESET1

Self Clearing Soft Reset 1. Reset the SPI registers (self clearing).

0x0

This bit must be accessed with all devices enabled.

SPI_LSB_FIRST1

SPI least significant bit first.

0x0

1 = least significant bit shifted first for all SPI operations. On multibyte SPI

operations, addressing increments automatically.

0 = most significant bit shifted first for all SPI operations. On multibyte SPI

operations, addressing decrements automatically.

This bit must be accessed with all devices enabled and is not reset by

setting the SPI_SOFT_RESET1 or SPI_SOFT_RESET2 bit.

CHIP ID REGISTER

Address: 0x001, Reset: 0xB2, Name: CHIP_ID

Table 12. Bit Descriptions for CHIP_ID

Bits

Bit Name

Description

Reset

Access

[7:0]

CHIP_ID

Chip ID.

0xB2

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