MFC2000 datasheet(256/426 Pages) ETC

256 / 426 page

MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

12-10

Conexant

100723A

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Step Clock Register

(SStepClk)

01FF8851

(Not Used)

Rst. Value

xxh

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Step Clock Register

(SStepClk)

01FF8850

(Not Used)

bit 4 of the

step clock

divider

bit 3 of the

step clock

divider

bit 2 of the

step clock

divider

bit 1 of the

step clock

divider

bit 0 of the

step clock

divider

Rst. Value

xxx00000b

Read Value

00h

•

STEPCLK = ICLK/(8 * (n+1)), n (bit[4:0] of the step clock divider): from 0 to 31

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Step Control

(SStepCtrl)

01FF8051

I31

I30

I21

I20

I11

I10

DI1

DI0

Rst. Value

FFh

Read Value

FFh

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Step Control

(SStepCtrl)

01FF8050

(Not Used)

SMI Output

Select

Scan Motor

Power

Control

MSINT0

Sync

0: disabled

1: enabled

Stepping

Mode

0: full step

1: half step

Motor

Direction

0: CW

CCW

Step Enable

0: disable

1: enable

STEPIRQ

Clear

1:clear

Rst. Value

x0000000b

Read Value

00h

Bits 15-14

The third current control values go out to the scan current control pins

(SMI1 and SMI0) within one step time period.

Bits 13-12

The second current control values go out to the scan current control

pins (SMI1 and SMI0) within one step time period.

Bits 11-10

The first current control values go out to the scan current control pins

(SMI1 and SMI0) within one step time period.

Bits 9-8

The default current control values go out to the scan current control

pins (SMI1 and SMI0) when the motor stepping is disabled and

SM[3:0] is used for motor control.

Bits 6

Control which signal output to PM[3:2] pins (SMI[1:0] output signals or

PM[3]/GPO[3] and PM[2]/GPO[2] output signals).

0: Output PM[3]/GPO[3] and PM[2]/GPO[2] signals, 1: Output SMI[1:0]

signals.

Address:

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default:

Step Timer Register

(SStepTimer)

01FF8053

(Not Used)

bit 13 of the

step timer

bit 12 of the

step timer

bit 11 of the

step timer

bit 10 of the

step timer

bit 9 of the

step timer

bit 8 of the

step timer

Rst. Value

00h

Read Value

00h

Address:

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default:

Step Timer Register

(SStepTimer)

01FF8052

bit 7 of the

step timer

bit 6 of the

step timer

bit 5 of the

step timer

bit 4 of the

step timer

bit 3 of the

step timer

bit 2 of the

step timer

bit 1 of the

step timer

bit 0 of the

step timer

Rst. Value

00h

Read Value

00h

•

The Time interval between two adjacent step pulses = (n+1)/STEPCLK, n (bit[13:0] of the step timer): from 0

to 16383

MFC2000 датащи(PDF) 256 Page - List of Unclassifed Manufacturers

MFC2000 датащи(HTML) 256 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL