MFC2000 datasheet(259/426 Pages) ETC

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Multifunctional Peripheral Controller 2000

MFC2000

100723A

Conexant

13-1

13. General Purpose Inputs/Outputs (GPIO)

13.1 GPIO Signals

The AMFPC provides 31 GPIO lines (GPIO[30:0]) typically used for I/O control, each of which is multiplexed with

other signals. The direction of each GPIO line (input or output) is programmable using the hardware registers

shown in Section 13.3.

GPIO0

GPIO0 is multiplexed with the flash memory write enable signal

(FWRn) for the NAND-type flash memory, this GPIO0 pin is also

multiplexed with W_Rn.

This pin is selected as a GPIO when bit 2 of the GPIOConfig1 register

is set to 0 and Emulator signals are not enabled, in this case, the

direction of this pin is controlled by bit 0 of the GPIODir register. If

GPIODir[0] is set to one, this pin will ouput the value of the bit 0 from

GPIOData register, and, if GPIODir[0] is set to zero, the value of the

GPIO0 can be read back by reading GPIOdata[0].

This pin is selected as FWRn when the GPIOConfig1 bit is set to 1, in

this case, this pin becomes an output pin regardless of the value in the

GPIODir[0].

This pin is selected as W_Rn when EMUSIG_EN is set to 1, refer to

Testmgr section for EMUSIG_EN signal definition.

GPIO1

GPIO1 is multiplexed with the flash memory read enable signal

(FRDn) for the NAND-type flash memory, this GPIO1 pin is also

multiplexed with XAKn.

This pin is selected as a GPIO when bit 2 of the GPIOConfig1register

is set to 0 and, in this case, the direction of this pin is controlled by bit

1 of the GPIODir register. If GPIODir[1] is set to one, this pin will ouput

the value of the bit 1 from GPIOData register, and, if GPIODir[1] is set

to zero, the value of the GPIO1 can be read back by reading

GPIOdata[1].

This pin is selected as FWRn when the GPIOConfig1 bit is set to 1, in

this case, this pin becomes an output pin regardless of the value in the

GPIODir[1].

This pin is selecetd as XAKn when EMUSIG_EN is set to 1, refer to

Testmgr section for EMUSIG_EN signal definition.

GPIO2

GPIO2 is multiplexed with SSCLK2, this pin is also used for the DMA

request input from DMA channel 1 (DMAREQ1). If this pin is used as

DMAREQ1, the direction of this pin needs to be set as input.

If SSCLK2 function is used, the bit 0 of GPIOConfig2 register needs to

be set to 1. If this pin is used as SSCLK2, the GPIO2 direction and

data setting for this pin is no longer valid.

When bit 16 of GPIOCofig register is set to 0, this pin can be used as

GPIO2, in this case, the direction of this pin is controlled by bit 2 of the

GPIODir register. The GPIO2 input/output value is controlled by bit 2

of the GPIOData register.

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