MFC2000 datasheet(252/426 Pages) ETC

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MFC2000 Multifunctional Peripheral Controller 2000

Hardware Description

12-6

Conexant

100723A

The scan motor stepping needs to synchronize to the scan cycle during scanning. Signal MSINT0 is used to

indicate the beginning of the scan cycle. MSINT0 synchronization can be enabled or disabled through the register

setting. This is the main difference between the Vertical Print Motor Control block and the Scan Motor Control

block.

The delay control logic is based on a loadable delay timer and a delay timer register. The MSINT0 and the delay

timer control when the Motor Timer Sub-block sends out the first stepping pulse after CPU enables the scan

motor stepping. Once, CPU enables the scan motor stepping, the Motor Timer Sub-block waits for the MSINT0

pulse to load the delay timer value from the delay timer register and activate the delay timer if the MSINT0

synchronization is enabled. Otherwise, the Motor Timer Sub-block loads the new timer value from the delay timer

Control Sub-block when the delay timer expires (timed-out). The delay timer only works once after CPU enables

the scan motor stepping for the first step.

The scan motor control lines are the four pins SM[3:0]/GPO[7:4]. These pins are selected as scanner motor

control lines when bit 1 in the GPIOconfig register is set to 0 (default), and are selected as GPO's when this bit is

set to 1. The scanner motor pattern or GPO data is output on pins SM[3:0]/GPO[7:4] from bits [3:0] of the

SMPattern register.

When selected as GPO's, data written by CPU to the SMPattern register is immediately output on the GPO pins

and output data are not changed unless CPU writes another new data to the SMPattern register.

When selected as scanner motor control lines, data is not allowed to be written to the SMPattern register no

matter whether the motor stepping is disabled or enabled.

Caution: The vertical print motor pattern register (SMPattern register) can only be written when

it is used as the GPO function. In other words, bit 1 of the GPIOConfig register is set to 1.

At the beginning of the motor moving process, CPU needs to write the stepping mode and the stepping direction

to the SStepCtrl register, the initial scan motor pattern to the SMPattern register, the delay timer value to the

SDelayTimer register, and the 1st step timer value to the SStepTimer register (used to define the time interval

between the 1st and 2nd steps).

Then, CPU sets bit 1 of the GPIOConfig register to 0 and enables the scan motor stepping. If the MSINT0

synchronization is disabled, the content of the delay timer register is immediately loaded into the step timer. If the

MSINT0 synchronization is enabled, the delay timer loading will be delayed until the beginning of the scan (seeing

the MSINT0 pulse). After Motor Timer Sub-block loads the new timer value from the delay timer register, It

activates the delay timer immediately. The first stepping pulse will be sent to the Motor Pattern Control Sub-block

when the delay timer expires (timed-out).

At the same time, the content (the 1st step timer value) of the step timer register is automatically loaded into the

step timer and an interrupt is generated. CPU writes the 2nd step timer value into the step timer register in the

stepping interrupt routine. When the step timer expires (timed-out), A pulse is generated to change the phase

pattern to the next one (the 2nd step) and the content (the 2nd step timer value) of the step timer register is

automatically loaded into the step timer and an interrupt is generated to inform CPU to load the 3rd step timer

value to the step timer register.

At the end of the motor stepping, a pulse is generated to change the phase pattern to the next one (the ‘n-2’ step,

n: the last step) and the content of the step timer register (the time interval between the ‘n-2’ and ‘n-1 steps) is

automatically loaded into the step timer and an interrupt is generated to inform CPU to load the last step timer

value to the step timer register when the step timer expires (timed-out). When the step timer expires again (timed-

out), A pulse is generated to change the phase pattern to the next one (the ‘n-1’ step) and the content (the last

step timer value) of the step timer register is automatically loaded into the step timer and an interrupt is generated

an interrupt is generated to inform CPU to load the large dummy timer value to the step timer register. Finally, a

pulse is generated to change the phase pattern to the next one (the last step) and the content (the large dummy

timer value) of the step timer register is automatically loaded into the step timer and an interrupt is generated to

inform CPU to disable the motor stepping. The step and delay timers are cleared to 0 and the stepping pulse is

blocked immediately after CPU disables the motor stepping.

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