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MFC2000 датащи(PDF) 255 Page - List of Unclassifed Manufacturers |
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MFC2000 датащи(HTML) 255 Page - List of Unclassifed Manufacturers |
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255 / 426 page ![]() Hardware Description MFC 2000 Multifunctional Peripheral Controller 2000 100723A Conexant 12-9 12.2.2 Scan Motor Current Control The current control logic is added to this block. Two current control output signals (SMI[1:0]) are needed to control 4 different current modes. Three different current modes can be used within the time period of one step (See Figure 12-5). T1 and T2 are programmable in one step period. The current mode in each current period of one step period is programmable. CPU can load T1 and T2 values and current modes of three current periods within one step for the next step at the same time when CPU loads the next step timer value by using the scan step interrupt (SSTEPIRQ). In other words, T1, T2, and current modes are double buffered. SMI[0] output value is 1 and SMI[1] output value is 1 after reset and when SM[3:0] pins are used as GPO’s. The default current mode is also programmable when SM[3:0] pins are used as motor control pins and motor stepping is disabled. changing step pattern (stepping to the next step) one step period one step period one step period different current modes different current modes different current modes T1 T2 T1 T1 T2 T2 Figure 12-5: Current Control Diagram Two current control signals (SMI1 and SMI0) share same pins with PM[3]/GPO[3] and PM[2]/GPO[2]. There is a SMI[1:0] output select bit in the SStepCtrl Register to select which signals output on PM[3:2] pins. 12.2.3 Register Description Address: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Default: Scanner Motor Pattern Register (SMPattern) 01FF8057 (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) (Not Used) Rst. Value xxh Read Value 00h Address: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default: Scanner Motor Pattern Register (SMPattern) 01FF8056 SMH[3] SMH[2] SMH[1] SMH[0] SMF[3] SMF[2] SMF[1] SMF[0] Rst. Value 00h Read Value 00h For the full step excitation, the phase pattern SM[3:0] (See Table 12-4 and Table 12-5) needs to be put into SMF[3:0] of this SMPattern register. Bit[7:4] of this register are ‘don’t care’. For the half step excitation, two adjacent phase patterns (See Table 12-6) need to be put into the SMPattern register: SM[3:0] at FP[x] column needs to be put into SMF[3:0] and SM[3:0] at HP[x] column needs to be put into SMH[7:4]. The current output at PM[3:0] is SMF[3:0]. |
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