TMS320DM6431 datasheet(90/227 Pages) TI1

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3.7.3.2 Peripherals Spanning Multiple Pin Mux Blocks

TMS320DM6431

Digital Media Processor

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Table 3-20. Multiplexed Pins on DM6431 (continued)

SIGNAL

PINMUX DESCRIPTION

ZWT

ZDU

NAME

PINMUX GROUP

CONTROLLED BY PINMUX BIT FIELDS

NO.

AXR0[3]/FSR0/GP[102]

Serial Port Sub-Block 0

SPBK0

AXR0[2]/FSX0/GP[103]

Serial Port Sub-Block 0

SPBK0

AXR0[1]/DX0/GP[104]

Serial Port Sub-Block 0

SPBK0

AXR0[0]/GP[105]

Serial Port Sub-Block 1

SPBK1

ACLKX0/GP[106]

Serial Port Sub-Block 1

SPBK1

AFSX0/GP[107]

Serial Port Sub-Block 1

SPBK1

AHCLKX0/GP[108]

Serial Port Sub-Block 1

SPBK1

AMUTEIN0/GP[109]

Serial Port Sub-Block 1

SPBK1

AMUTE0/GP[110]

Serial Port Sub-Block 1

SPBK1

HECC_RX/TINP1L/GP[56]

Timer 1 Block

TIM1BK

HECC_TX/TOUT1L/GP[55]

Timer 1 Block

TIM1BK

TINP0L/GP[98]

Timer 0 Block

TIM0BK

CLKS0/TOUT0L/GP[97]

Timer 0 Block

TIM0BK

URXD0/GP[85]

UART0 Data Block

UR0DBK

UTXD0/GP[86]

UART0 Data Block

UR0DBK

UCTS0/GP[87]

UART0 Flow Control Block

UR0FCBK

URTS0/PWM0/GP[88]

UART0 Flow Control Block

UR0FCBK

CLKOUT0/PWM2/GP[84]

CLKOUT Block

CKOBK

Note: PINMUX group EMIFA/VPSS Sub-Block 2 is not shown in the above table because there is no

actual pin multiplexing in that block. But this block is still considered a "pin mux block" because it contains

some of the pins necessary for EMIFA. The pins in this block are as follows:

• EMIFA/VPSS Sub-Block 2

–

EM_WAIT/(RDY/BSY)

–

EM_OE

–

EM_WE

Some peripherals span multiple Pin Mux Blocks. To use these peripherals, they must be selected in all of

the relevant Pin Mux Blocks. The following is the list of peripherals that span multiple Pin Mux Blocks:

• McBSP0: Six McBSP0 pins are located in the Serial Port Sub-Block 0, but the CLKS0 pin is muxed in

the Timer0 Block. To select McBSP0 pins, program PINMUX registers as follows:

–

Serial Port Sub-Block 0: SPBK0 = 01

–

Timer0 Block: If CLKS0 pin is desired, program TIM0BK = 10 or 11.

• UART0: The two UART0 data pins are located in the UART0 Data Block, but the two UART0 flow

control pins are located in the UART0 Flow Control Block. To select UART0, program PINMUX

registers as follows:

–

UART0 Data Block: UR0BK = 1

–

UART0 Flow Control Block: If flow control pins are desired, program UR0FCBK = 01.

Device Configurations

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