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TMS320DM6431 датащи(PDF) 37 Page - Texas Instruments

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номер детали TMS320DM6431
подробное описание детали  Digital Media Processor
PDF  227 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320DM6431 датащи(HTML) 37 Page - Texas Instruments

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TMS320DM6431
Digital Media Processor
www.ti.com
SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008
Table 2-13. EMAC and MDIO Terminal Functions
SIGNAL
TYPE(1)
OTHER(2)(3)
DESCRIPTION
ZWT
ZDU
NAME
NO.
NO.
EMAC
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXEN/GP[75]
D3
C4
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Enable input MTXEN.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXCLK/GP[73]
A4
A4
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Clock input MTXCLK.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MCOL/GP[67]
C6
C6
I/O/Z
DVDD33
In Ethernet MAC mode, it is Collision Detect input MCOL.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXD3/GP[69]
C5
A5
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Data 3 output MTXD3.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXD2/GP[70]
D5
C5
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Data 2 output MTXD2.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXD1/GP[71]
B4
B4
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Data 1 output MTXD1.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MTXD0/GP[72]
D4
B5
I/O/Z
DVDD33
In Ethernet MAC mode, it is Transmit Data 0 output MTXD0.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXCLK/GP[77]
A3
A3
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Clock input MRXCLK.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXDV/GP[74]
C4
D3
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Data Valid input MRXDV.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXER/GP[76]
B3
B2
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Error input MRXER.
IPD
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MCRS/GP[68]
B5
B6
I/O/Z
DVDD33
In Ethernet MAC mode, it is Carrier Sense input MCRS.
IPU
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXD3/GP[82]
C2
D2
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Data 3 input MRXD3.
IPU
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXD2/GP[80]
D2
C3
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Data 2 input MRXD2.
IPU
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXD1/GP[79]
B2
B3
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive data 1 input MRXD1.
IPU
This pin is multiplexed between Ethernet MAC (EMAC) and GPIO.
MRXD0/GP[78]
C3
C2
I/O/Z
DVDD33
In Ethernet MAC mode, it is Receive Data 0 input MRXD0.
MDIO
This pin is multiplexed between MDIO and GPIO.
IPU
MDCLK/GP[81]
C1
D1
I/O/Z
In Ethernet MAC mode, it is Management Data Clock output
DVDD33
MDCLK.
IPU
This pin is multiplexed between MDIO and GPIO.
MDIO/GP[83]
D1
C1
I/O/Z
DVDD33
In Ethernet MAC mode, it is Management Data IO MDIO (I/O/Z).
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2)
IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal
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Device Overview
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