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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT69F360 датащи(PDF) 150 Page - Holtek Semiconductor Inc |
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HT69F360 датащи(HTML) 150 Page - Holtek Semiconductor Inc |
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150 / 235 page  Rev. 1.30 150 �ove��e� 1�� �01� Rev. 1.30 151 �ove��e� 1�� �01� HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM HT69F340/HT69F350/HT69F360 TinyPowerTM I/O Flash MCU with LCD & EEPROM Bit0 SIMICF:SIMIncompleteFlag 0:SIMincompleteisnotoccurred 1:SIMincompleteisoccurred TheSIMICFbitisdeterminedbySCSpin.WhenSCSpinissetto“1”,itwillclearthe SPIcounter.Meanwhile,theinterruptisoccurred,ifslavedevicedidn’tcompletedata received,thentheincompleteflag,SIMICF,issetto“1”. SIMC2 Register Bit 7 6 5 4 3 2 1 0 �a�e D7 D� CKPOLB CKEG MLS CSE� WCOL TRF R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~6 Undefinedbits Thesebitscanbereadorwrittenbyusersoftwareprogram. Bit5 CKPOLB:Determinesthebaseconditionoftheclockline 0:theSCKlinewillbehighwhentheclockisinactive 1:theSCKlinewillbelowwhentheclockisinactive TheCKPOLBbitdeterminesthebaseconditionoftheclockline,ifthebitishigh, thentheSCKlinewillbelowwhentheclockisinactive.WhentheCKPOLBbitis low,thentheSCKlinewillbehighwhentheclockisinactive. Bit4 CKEG:DeterminesSPISCKactiveclockedgetype CKPOLB=0 0:SCKishighbaselevelanddatacaptureatSCKrisingedge 1:SCKishighbaselevelanddatacaptureatSCKfallingedge CKPOLB=1 0:SCKislowbaselevelanddatacaptureatSCKfallingedge 1:SCKislowbaselevelanddatacaptureatSCKrisingedge TheCKEGandCKPOLBbitsareusedtosetupthewaythattheclocksignaloutputs andinputsdataontheSPIbus.Thesetwobitsmustbeconfiguredbeforedatatransfer isexecutedotherwiseanerroneousclockedgemaybegenerated.TheCKPOLBbit determinesthebaseconditionoftheclockline,ifthebitishigh,thentheSCKline willbelowwhentheclockisinactive.WhentheCKPOLBbitislow,thentheSCK linewillbehighwhentheclockisinactive.TheCKEGbitdeterminesactiveclock edgetypewhichdependsupontheconditionofCKPOLBbit. Bit3 MLS:SPIDatashiftorder 0:LSB 1:MSB Thisisthedatashiftselectbitandisusedtoselecthowthedataistransferred,either MSBorLSBfirst.SettingthebithighwillselectMSBfirstandlowforLSBfirst. Bit2 CSEN:SPISCSpinControl 0:Disable 1:Enable TheCSENbitisusedasanenable/disablefortheSCSpin.Ifthisbitislow,thenthe SCSpinwillbedisabledandplacedintoI/Opinortheotherfunctions.Ifthebitis hightheSCSpinwillbeenabledandusedasaselectpin. Bit1 WCOL:SPIWriteCollisionflag 0:Nocollision 1:Collision TheWCOLflagisusedtodetectifadatacollisionhasoccurred.Ifthisbitishighit meansthatdatahasbeenattemptedtobewrittentotheSIMDregisterduringadata transferoperation.Thiswritingoperationwillbeignoredifdataisbeingtransferred. Thebitcanbeclearedbytheapplicationprogram. |
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