S3A3 datasheet(14/139 Pages) RENESAS

14 / 139 page

R01DS0307EU0100 Rev.1.00

Page 14 of 139

Mar 7, 2017

S3A3

1. Overview

1.5

Pin Functions

Function

Signal

I/O

Description

Power supply

VCC

Input

Power supply pin. Connect it to the system power supply. Connect this pin

to VSS by a 0.1-μF capacitor. The capacitor should be placed close to the

pin.

VCL

Input

Connect this pin to the VSS pin by the smoothing capacitor used to stabilize

the internal power supply. Place the capacitor close to the pin.

VSS

Input

Ground pin. Connect it to the system power supply (0 V).

VBATT

Input

Backup power pin

Clock

XTAL

Output

Pins for a crystal resonator. An external clock signal can be input through

the EXTAL pin.

EXTAL

Input

XCIN

Input

Input/output pins for the sub-clock oscillator. Connect a crystal resonator

between XCOUT and XCIN.

XCOUT

Output

EBCLK

Output

Outputs the external bus clock for external devices

CLKOUT

Output

Clock output pin

Operating mode

control

Input

Pins for setting the operating mode. The signal levels on these pins must

not be changed during operation mode transition at the time of release from

the reset state.

System control

RES

Input

Reset signal input pin. The MCU enters the reset state when this signal

goes low.

CAC

CACREF

Input

Measurement reference clock input pin

Interrupt

NMI

Input

Non-maskable interrupt request pin

IRQ0 to IRQ15

Input

Maskable interrupt request pins

KINT

KR00 to KR07

Input

A key interrupt can be generated by inputting a falling edge to the key

interrupt input pins

On-chip debug

TMS

I/O

On-chip emulator or boundary scan pins

TDI

Input

TCK

Input

TDO

Output

SWDIO

I/O

Serial Wire debug Data Input/Output pin

SWCLK

Input

Serial Wire Clock pin

SWO

Output

Serial Wire trace Output pin

External bus

interface

Output

Strobe signal which indicates that reading from the external bus interface

space is in progress, active-low

Output

Strobe signal which indicates that writing to the external bus interface space

is in progress, in 1-write strobe mode, active-low

WR0, WR1

Output

Strobe signals which indicate that either group of data bus pins (D07 to

D00, D15 to D08) is valid in writing to the external bus interface space, in

byte strobe mode, active-low

BC0, BC1

Output

Strobe signals which indicate that either group of data bus pins (D07 to

D00, D15 to D08) is valid in access to the external bus interface space, in 1-

write strobe mode, active-low

ALE

Output

Address latch signal when address/data multiplexed bus is selected

WAIT

Input

Input pin for wait request signals in access to the external space, active-low

CS0 to CS3

Output

Select signals for CS areas, active-low

A00 to A23

Output

Address bus

D00 to D15

I/O

Data bus

Battery backup

VBATWIO0 to

VBATWIO2

I/O

Output wakeup signal for the VBATT wakeup control function.

External event input for the VBATT wakeup control function.

S3A3 датащи(PDF) 14 Page - Renesas Technology Corp

S3A3 датащи(HTML) 14 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL