S3A3 datasheet(112/139 Pages) RENESAS

112 / 139 page

R01DS0307EU0100 Rev.1.00

Page 112 of 139

Mar 7, 2017

S3A3

2. Electrical Characteristics

Note 1.

When OFS1.LVDAS = 0.

Note 2.

When OFS1.LVDAS = 1.

Note 3.

The minimum VCC down time indicates the time when VCC is below the minimum value of voltage detection levels VPOR,

Vdet0, Vdet1, and Vdet2 for the POR/LVD.

Figure 2.84

Voltage detection reset timing

Table 2.63

Power-on reset circuit and voltage detection circuit characteristics (2)

Parameter

Symbol

Min

Typ

Max

Unit

Test conditions

Wait time after power-on

reset cancellation

LVD0:enable

tPOR

-1.7

LVD0:disable

tPOR

-1.3

Wait time after voltage

monitor 0,1,2 reset

cancellation

LVD0:enable*1

tLVD0,1,2

-0.6

LVD0:disable*2

tLVD1,2

-0.2

Response delay*3

tdet

350

μs

Figure 2.84,

Figure 2.85

Minimum VCC down time

tVOFF

450

μs

Figure 2.84,

VCC = 1.0 V or above

Power-on reset enable time

tW (POR)

Figure 2.85,

VCC = below 1.0 V

LVD operation stabilization time (after LVD is

enabled)

td (E-A)

300

μs

Figure 2.87,

Figure 2.88

Hysteresis width (POR)

VPORH

-110

Hysteresis width (LVD0, LVD1, and LVD2)

VLVH

-60

LVD0 selected

100

Vdet1_0 to Vdet1_2 selected

-60

Vdet1_3 to Vdet1_9 selected

-50

Vdet1_A or Vdet1_B selected

-40

Vdet1_C or Vdet1_F selected

-60

LVD2 selected

Internal reset signal

(active-low)

VCC

tVOFF

tPOR

tdet

VPOR

tdet

1.0 V

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