AD7183 datasheet(33/40 Pages) AD

33 / 40 page

REV. 0

ADV7183

–33–

Table XLIV. Miscellaneous Gain Control Register (Subaddress 33)

Bit Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Register Setting

PW_UPD

Update Gain Once per Line

Update Gain Once per Field

AV_AL

Lines 33 to 310

Lines 33 to 270

MIRE[2:0]

PAL-133 NTSC-122

PAL-125 NTSC-115

PAL-120 NTSC-110

PAL-115 NTSC-105

PAL-110 NTSC-100

PAL-105 NTSC-100

PAL-100 NTSC-100

RESERVED

Set to One

CKE

Color Kill Disabled

Color Kill Enabled

RESERVED

Set to One

NOTES

1Peak White Update. Determines the gain based on measurements taken from the active video; this bit determines the rate of gain change. LAGC[1:0] must be set to

the appropriate mode to enable peak white or average video in the first case.

2Average Brightness Active Lines. Allows the selection between two ranges of active video to determine the average brightness.

3Max IRE. Sets the max I/p IRE level depending on the video standard.

4Color Kill Enable. Allows the optional color kill function to be switched on or off.

Table XLV. HSync Position Control 1 Register (Subaddress 34)

Bit Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register Setting

RESERVED

1111Set to One

HSE[9:8]

HSync ends after HSE[9:0] pixel after falling edge

of HSync.

HSB[9:8]

HSync starts after HSB[9:0] pixel after the falling

edge of HSync.

NOTES

1HSync End. Allows the positioning of the HSync output within the video line.

2HSync Begin. Allows the positioning of HSync output within the video line.

Table XLVI. HSync Position Control 2 Register (Subaddress 35)

Bit Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Register Setting

HSB[7:0]

00000001

1Using HSB[9:0] and HSE[9:0] the user can program the position and length of HSync output signal.

Table XLVII. HSync Position Control 3 Register (Subaddress 36)

Bit Description

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Register Setting

HSE[7:0]

00000001

1Using HSB[9:0] and HSE[9:0] the user can program the position and length of HSync output signal.

AD7183 датащи(PDF) 33 Page - Analog Devices

AD7183 датащи(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

датащи скачать

ссылки URL