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STM8L101x2 датащи(PDF) 48 Page - STMicroelectronics |
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STM8L101x2 датащи(HTML) 48 Page - STMicroelectronics |
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48 / 88 page ![]() Electrical parameters STM8L101x1 STM8L101x2 STM8L101x3 48/88 DocID15275 Rev 16 9.3.6 I/O port pin characteristics General characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. All unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. Iprog Programming/ erasing consumption TA=+25 °C, VDD = 3.0 V - 0.7 - mA TA=+25 °C, VDD = 1.8 V - - tRET Data retention (program memory) after 10k erase/write cycles at TA = +85 °C TRET = 55 °C 20(1) -- years Data retention (data memory) after 10k erase/write cycles at TA = +85 °C TRET = 55 °C 20(1) -- Data retention (data memory) after 300k erase/write cycles at TA = +125 °C TRET = 85 °C 1(1) -- NRW Erase/write cycles (program memory) See notes (1)(2) 10(1) -- kcycles Erase/write cycles (data memory) See notes (1)(3) 300(1)(4) -- 1. Guaranteed by characterization results. 2. Retention guaranteed after cycling is 10 years at 55 °C. 3. Retention guaranteed after cycling is 1 year at 55 °C. 4. Data based on characterization performed on the whole data memory (2 Kbytes). Table 25. Flash program memory (continued) Symbol Parameter Conditions Min Typ Max (1) Unit Table 26. I/O static characteristics (1) Symbol Parameter Conditions Min Typ Max Unit VIL Input low level voltage(2) Standard I/Os VSS-0.3 - 0.3 x VDD V True open drain I/Os VSS-0.3 - 0.3 x VDD VIH Input high level voltage (2) Standard I/Os 0.70 x VDD -VDD+0.3 V True open drain I/Os VDD < 2 V 0.70 x VDD - 5.2 True open drain I/Os VDD ≥ 2 V 5.5 Vhys Schmitt trigger voltage hysteresis (3) Standard I/Os - 200 - mV True open drain I/Os - 250 - |
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