ST72344K2 datasheet(196/247 Pages) STMICROELECTRONICS

196 / 247 page

Instruction set

ST72344xx, ST2345xx

196/247

Doc ID 12321 Rev 6

12.2.1

Illegal opcode reset

In order to provide enhanced robustness to the device against unexpected behavior, a

system of illegal opcode detection is implemented. If a code to be executed does not

correspond to any opcode or prebyte value, a reset is generated. This, combined with the

Watchdog, allows the detection and recovery from an unexpected fault or interference.

Note:

A valid prebyte associated with a valid opcode forming an unauthorized combination does

not generate a reset.

Table 83.

Illegal opcode detection

Mnemo

Description

Function/Example

Dst

Src

ADC

Add with Carry

A = A + M + C

ADD

Addition

A = A + M

AND

Logical And

A = A . M

BCP

Bit compare A,

Memory

tst (A . M)

BRES

Bit Reset

bres Byte, #3

BSET

Bit Set

bset Byte, #3

BTJF

Jump if bit is false (0)

btjf Byte, #3, Jmp1

BTJT

Jump if bit is true (1)

btjt Byte, #3, Jmp1

CALL

Call subroutine

CALLR

Call subroutine

relative

CLR

Clear

reg, M

Arithmetic Compare

tst(Reg - M)

reg

CPL

One Complement

A = FFH-A

reg, M

DEC

Decrement

dec Y

reg, M

HALT

Halt

IRET

Interrupt routine

return

Pop CC, A, X, PC

INC

Increment

inc X

reg, M

Absolute Jump

jp [TBL.w]

JRA

Jump relative always

JRT

Jump relative

JRF

Never jump

jrf *

JRIH

Jump if ext. interrupt

= 1

JRIL

Jump if ext. interrupt

= 0

JRH

Jump if H = 1

H = 1 ?

JRNH

Jump if H = 0

H = 0 ?

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