PC97338 datasheet(114/221 Pages) NSC

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Fourth Command Phase Byte,

Bits 7-4 - MSN of Track Number

If the track number is stored as a 12-bit value,

these bits contain the Most Significant Nibble

(MSN), i.e., the four most significant bits, of the

number of the track to seek. Otherwise (the ETR

bit in the MODE command is 0), this command

phase byte is not required.

Execution Phase

During the execution phase of the SEEK command,

the track number to seek to is compared with the

present track number. The controller determines how

many STEP pulses to issue and the DIR disk interface

output signal indicates which direction the head

should move.

The SEEK command issues step pulses while the con-

troller is in the drive polling phase. The step pulse rate is

determined by the value programmed in the second

command phase byte of the SPECIFY command.

An interrupt is generated one step pulse period after

the last step pulse is issued. A SENSE INTERRUPT

command should be issued to determine the cause of

the interrupt.

Result Phase

None.

3.6.18 The SENSE DRIVE STATUS

Command

The SENSE DRIVE STATUS command indicates which

drive and which head are selected, whether or not the

head is at track 0 and whether or not the track is write

protected in result phase Status register 3 (ST3). See

“Result Phase Status Register 3 (ST3)” on page 91. This

command does not generate an interrupt.

Command Phase

See READ DATA command for a description of these bits.

Execution Phase

Disk drive status information is detected and reported.

Result Phase

See “Result Phase Status Register 3 (ST3)” on page 91.

3.6.19 The SENSE INTERRUPT

Command

The SENSE INTERRUPT command returns the

cause of an interrupt that is caused by the change in

status of any disk drive.

If a SENSE INTERRUPT command is issued when no

interrupt is pending it is treated as an invalid com-

mand.

When to Issue SENSE INTERRUPT

The SENSE INTERRUPT command is issued to de-

tect either of the following causes of an interrupt:

• The FDC became ready during the drive polling

phase for an internally selected drive. See “Drive

Polling Phase” on page 88. This can occur only af-

ter a hardware or software reset.

• A SEEK, RELATIVE SEEK or RECALIBRATE

command terminated.

Interrupts caused by these conditions are cleared af-

ter the first result byte has been read. Use the Inter-

rupt Code (IC) (bits 7,6) and SEEK End bits (bit 5) of

result phase Status register 0 (ST0) to identify the

cause of these interrupts. See page 89 and Table 56.

TABLE 56. Interrupt Causes Reported by SENSE

INTERRUPT

When SENSE INTERRUPT is not

Necessary

Interrupts that occur during most command opera-

tions do not need to be identified by the SENSE IN-

TERRUPT. The microprocessor can identify them by

checking the Request for Master (RQM) bit (bit 7) of

the Main Status Register (MSR). See page “Bit 7 - Re-

quest for Master (RQM)” on page 81.

It is not necessary to issue a SENSE INTERRUPT

command to detect the following causes of Interrupts:

7654

3210

0000

0100

XXX

DS1

DS0

7654

3210

Result Phase Status Register 3 (ST3)

Bits of

ST0

Interrupt Cause

765

0 FDC became ready during drive polling

mode.

SEEK, RELATIVE SEEK or

RECALIBRATE not completed.

1 SEEK, RELATIVE SEEK or

RECALIBRATE terminated normally.

1 SEEK, RELATIVE SEEK or

RELCALIBRATE terminated abnormally.

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