PC87309VLJ datasheet(159/192 Pages) NSC

159 / 192 page

Mouse and Keyboard Controller (KBC) (Logical Devices 5 and 6)

159

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8.2

FUNCTIONAL OVERVIEW

The KBC supports two external devices — a keyboard and

a mouse. Each device communicates with the KBC via two

bidirectional serial signals. Five additional external general-

purpose I/O signals are provided.

KBC operation involves three signal interfaces:

External I/O interface

Internal KBC - PC87309 interface

PC87309 - PC chip set interface.

These system interfaces are shown in FIGURE FIGURE

8-2 "System Interfaces".

The KBC uses two data registers (for input and output) and

a status register to communicate with the PC87309 central

system. Data exchange between these units may be based

on programmed I/O or interrupt-driven.

The KBC has two internal interrupts: the Input Buffer Full

(IBF) interrupt and Timer Overflow interrupt (see FIGURE

8-1 "KBC System Functional Block Diagram" on page 158).

These two interrupts can be independently enabled or dis-

abled by KBC firmware. Both are disabled by a hard reset.

These two interrupts only affect the execution flow of the

KBC firmware, and have no connection with the external in-

terrupts requested by this logical device.

The KBC can generate two external interrupt requests.

These request signals are controlled by the KBC firmware

which generates them by manipulating I/O port signals. See

Section 8.3.2 "Interrupt Request Signals".

The PC87309 supports the KBC and handles interactions

with the PC chip set. In addition to data transfer, these inter-

actions include KBC configuration, activation and status

monitoring. The PC87309 interconnects with the host via

one interface that is shared by all chip devices

The KBC clock is generated from the main clock of the chip,

which may come from an external clock source or from the

internal frequency multiplier. (See Section 8.3 "DEVICE

CONFIGURATION" and FIGURE 8-5 "Timing Generation

and Timer Circuit" on page 161.) The KBC clock rate is con-

figured by the SIO Configuration Registers.

FIGURE 8-2. System Interfaces

8.3

DEVICE CONFIGURATION

The KBC hardware contains two logical devices—the mouse

(Logical Device 5) and the keyboard (Logical Device 6).

8.3.1

I/O Address Space

The KBC has two I/O addresses and one IRQ line (KBC

IRQ) and can operate without the companion mouse.

The mouse cannot operate without the KBC device. It has

one IRQ line (mouse IRQ) but has no I/O address. It utilizes

the KBC I/O addresses.

8.3.2

Interrupt Request Signals

The KBC IRQ and Mouse IRQ interrupt request signals are

identical to (or functions of) the P24 and P25 signals of the

8042. These interrupt request signals are routed internally

to the Plug and Play interrupt Matrix and may be routed to

user-programmable IRQ pins. Each logical device is inde-

pendently controlled.

The Interrupt Select registers (index 70h for each logical de-

vice) select the IRQ pin to which the corresponding interrupt

request is routed. The interrupt may also be disabled by not

routing its request signal to any IRQ pin.

Chip Set

SA15-0

PC87309

XD7-0

A15-0

D7-0

AEN

KBC IRQ

Mouse IRQ

KBC Device

KBCLK

KBDAT

TEST0

P10

Keyboard Clock

Keyboard Data

MCLK

MDAT

TEST1

P11

Mouse Clock

Mouse Data

P26

P27

P23

P22

STATUS

DBBIN

DBBOUT

Plug and

Play

Matrix

P24

P25

P20

P21

P12

IRQn

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