DocID027248 Rev 2

15/26

L2G2IS

Digital interfaces

26

5

Digital interfaces

The registers embedded inside the L2G2IS may be accessed through the SPI serial

interfaces.

5.1

SPI bus interface

The SPI is a bus slave. The SPI allows to write and read the registers of the device.

The serial interface connects to applications using 4 wires: CS, SCL, SDI and SDO.

CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of

the transmission and goes back high at the end. SCL is the serial port clock and it is

controlled by the SPI master. It is stopped high when CS is high (no transmission). SDI and

SDO are respectively the serial port data input and output. Those lines are driven at the

falling edge of SCL and should be captured at the rising edge of SCL.

Both the read register and write register commands are completed in 16 clock pulses or in

multiples of 8 in case of multiple read/write bytes. Bit duration is the time between two falling

edges of SCL. The first bit (bit 0) starts at the first falling edge of SCL after the falling edge

of CS while the last bit (bit 15, bit 23, ...) starts at the last falling edge of SCL just before the

rising edge of CS.

bit 0: RW bit. When 0, the data DI(7:0) is written into the device. When 1, the data DO(7:0)

from the device is read. In latter case, the chip will drive SDO at the start of bit 8.

bit 1-7: address AD(6:0). This is the address field of the indexed register.

bit 8-15: data DI(7:0) (write mode). This is the data that is written into the device (MSb first).

bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).

The function and the behavior of SDI and SDO remain unchanged.

Table 9. Serial interface pin description

Pin name

Pin description

CS

Chip-select line

SCL

SPI serial port clock

SDI/SDO

Serial data input (SDI)

3-wire interface serial data output (SDO)

SDO

Serial data output (SDO)