ADP3500

REV.PrP 2/6/02

- 18 -

2.1.2 RESET output control and 32KHz output control

Using Voltage Detect signal, device generates 32K OUT, RSTDELAY-, RESETOUT-, and RESET signals. About 32mS after

rtc_voltage_detect (Voltage Detect signal in RTCV supply) signal goes from “0” to “1”, 32K OUT signal is generated from

internal RTC_CLK32K signal. RSTDELAY_N (RSTDELAY-) goes to “0” when rtc_voltage_detect is “0”, and it goes to “1”

at 50mS after the “0” to “1” transition of rtc_voltage_detect. RESETOUT_N (RESETOUT-) and RESET toggle their states.

Signal clk512 is a 512Hz, which generated in USEC counter block.

2.2 SERIAL INTERFACE

Serial I/F WRITE Timing

CLKIN

CS

Serial

DATA

ADDR5

ADDR4 0 CTRL1 (W) CTRL2 (W) DATA7

1

DATA0

Serial I/F READ Timing Single Mode

CLKIN

CS

Serial

DATA

ADDR5

ADDR4

0

CTRL1 (R) CTRL2 (R)

DATA7

1

DATA0

Serial I/F READ Timing Continuous Mode

CLKIN

CS

Serial

DATA

ADDR5

ADDR4 0 CTRL1 (R) CTRL2 (R) DATA7

1

DATA0

ADDR5

ADDR4

Figure 9. Serial Interface signal

Table 3. Set up and Hold Specifications

Parameter

Min.

Typ.

Max

Units

Test Condition/Comments

PRELIMINARY TECHNICAL DATA