ADP3500

REV.PrP 2/6/02

- 22 -

PowerOnKey

POWERON

LDO1,2,3, 6

LDO1b, 2b, 6b

Voltage Detector

voltage_detect_delay

RSTDELAY-

OPT2

INT-

Serial I/F

10mS

50mS

POWER ON

POWER OFF

Clear INT- and set PWROFF(21h)=1

Clear INT-

Figure 14. Power ON sequence

2.7 10 MILISECOND DELAY

This block generates a 10mS delayed signal after the reset of the voltage_detect signal is released. After 10mS (11 clocks of

1024Hz) since the voltage_detect signal is asserted, the voltage_detect_delay signal is asserted. If the duration of the

voltage_detect signal is less than 10mS, voltage_detect_delay signal will not be asserted. When the voltage_detect signal is

released, the voltage_detect_delay signal is also released simultaneously. The voltage_detect_delay signal can be reset with

writing “1” in POWER OFF register (21h).

* User just need to write “1” in the POWER OFF register to reset voltage_detect _delay, and not need to over-write it with “0”.

2.8 LDO CONTROL

The LDO control block controls Power ON/OFF of LDO block. The function in this block has:

•

Hardware control using external signals

•

Software control using serial interface

•

Mixture of hardware and software above

LDO1, LDO2, LDO3, and LDO6 are structured with Main and Sub LDOs. LDO4, LDO5, LDO7, LDO8, LDO9, LDO10, and

LDO11 are set through serial interface but LDO7 and LDO9 are gated (AND gate) with SLEEP- signal, in order to get into

Sleep mode. If the SLEEP- signal is enabled (goes “Low”), the outputs of LDO7 and LDO9 are turned OFF. Remainder of

LDOs as LDO1, LDO2, and LDO6 is controlled by “Power On Logic”. A Sub LDO called “LDO3b” is independent control

and this LDO control block doesn’t control LDO3b. And Main LDO3 called “LDO3a” is turned on by power_on signal, but

Sub LDO3 called “LDO3b” is always ON while Battery supplies and LDO3b is only controlled by DDLO. A DDLO is control

signal from Battery charger block and is monitoring Battery voltage. When VBAT is under 2.5V (200mV hysteresis from

VBAT=2.7V), DDLO minimizes (DDLO enable) current flow from Li-Ion battery.

Main LDOs

: LDO1a, LDO2a, LDO3a, LDO6a

Sub LDOs

: LDO1b, LDO2b, LDO3b, LDO6b

Table 4a. DDLO status table

Status

LDO1a LDO1b LDO2a LDO2b LDO3a LDO3b LDO4

REFO

LDO5

LDO6a LDO6b LDO7

LDO8

LDO9 LDO10 LDO11

Baseband VDD

Baseband

AVDD

Coin cell

Audio

REFO

Vibrator

Baseband Core

Rx1

Tx

Rx2

RF

Option

Option

DDLO Enable

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

DDLO Disable

XXX

XX

ON

XX

X

X

X

X

XXXX

Note

PRELIMINARY TECHNICAL DATA