AD7265ASU datasheet(12/16 Pages) AD

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AD7265

Preliminary Technical Data

TRANSFER FUNCTIONS

The designed code transitions occur at successive integer LSB

values (i.e., 1 LSB, 2 LSB, and so on). The LSB size is VREF/4096.

The ideal transfer characteristic for the AD7265 when straight

binary coding is output is shown in Figure 6, and the ideal

transfer characteristic for the AD7265 when twos complement

coding is output is shown in Figure 7.

000...000

111...111

1LSB = VREF/4096

1LSB

VREF – 1LSB

ANALOG INPUT

000...001

000...010

111...110

111...000

011...111

Figure 6. Straight Binary Transfer Characteristic

100...000

011...111

1LSB = 2

× VREF/4096

+VREF – 1 LSB

–VREF + 1LSB VREF – 1LSB

ANALOG INPUT

100...001

100...010

011...110

000...001

000...000

111...111

Figure 7. Twos Complement Transfer Characteristic with VREF ±VREF Input

Range

DIGITAL INPUTS

The digital inputs applied to the AD7265 are not limited by the

maximum ratings that limit the analog inputs. Instead, the

digital inputs applied can go to 7 V and are not restricted by the

VDD + 0.3 V limit as on the analog inputs. See the Absolute

Maximum Ratings. Another advantage of SCLK, RANGE,

A0–A2, and CS not being restricted by the VDD + 0.3 V limit is

that power supply sequencing issues are avoided. If one of these

digital inputs is applied before VDD, there is no risk of latch-up,

as there would be on the analog inputs if a signal greater than

0.3 V were applied prior to VDD.

VDRIVE

The AD7265 also has the VDRIVE feature, which controls the

voltage at which the serial interface operates. VDRIVE allows the

ADC to easily interface to both 3 V and 5 V processors. For

example, if the AD7265 was operated with a VDD of 5 V, the

VDRIVE pin could be powered from a 3 V supply, allowing a large

dynamic range with low voltage digital processors. For example,

the AD7265 could be used with the 2 × VREF input range, with a

VDD of 5 V while still being able to interface to 3 V digital parts.

Rev. PrA | Page 12 of 16

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