LM9812 datasheet(5/37 Pages) NSC

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IDI/O

Digital I/O Supply Current

Operating, VDI/O=5.0V

Standby, VDI/O= 5.0V

Operating, VDI/O=3.3V

Standby, VDI/O= 3.3V

0.3

mA (max)

AC Electrical Characteristics, MCLK Independent

The following specifications apply for AGND=DGND=DGNDI/O=0V, VA=VD=VDI/O=+5.0VDC, VREF IN = +2.0VDC, fMCLK=24MHz,

tMCLK=1/fMCLK, tr=tf=5ns, Rs=25¾, CL (databus loading) = 50pF/pin.

Boldface limits apply for TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. (Notes 7 & 8)

Symbol

Parameter

Conditions

Typical

(Note 9)

Limits

(Note 10)

Units

(Limits)

fMCLK

Maximum MCLK Frequency

Minimum MCLK Frequency

MHz (min)

MHz (max)

MCLK Duty Cycle

% (min)

% (max)

tSETUP (OUT)

Coefficient Data valid before latching

edge of OCLK or GCLK

GCLK and OCLK as

outputs

ns (min)

tHOLD (OUT)

Coefficient Data held after latching

edge of OCLK or GCLK

GCLK and OCLK as

outputs

-10

ns (min)

tSETUP (IN)

Coefficient Data Valid before latching

edge of OCLK or GCLK

GCLK and OCLK as

inputs

ns (min)

tHOLD (IN)

Coefficient Data held after latching

edge of OCLK or GCLK

GCLK and OCLK as

inputs

ns (min)

tGCLK-EOC

Rising edge of GLCK to falling edge

of EOC (GCLK as output)

2ns

tGCLK-OCLK

Rising edge of GLCK to falling edge

of OCLK (GCLK and OCLK as

outputs)

2 bus / 2 clock mode

tEOC-OCLK

Rising edge of EOC to rising edge of

OLCK (OCLK as output)

2 clock mode

tOCLK-GCLK

Rising edge of OLCK to falling edge

of GLCK (GCLK and OCLK as

outputs)

2 clock mode

tEOC-GCLK

Rising edge of EOC to falling edge of

GLCK (GCLK as output)

2 bus mode

tDACC

RD or RD_PIXEL low to D0-D9 data

valid

ns (max)

tD1H, D0H

RD or RD_PIXEL high to D0-D9 data

tri-state

ns (max)

tCS SETUP

CS setup of RD or WR

ns (min)

tCS HOLD

CS hold after RD or WR

ns (min)

tWR SETUP

D0-D9 data valid before rising edge

of WR (setup time)

ns (min)

DC and Logic Electrical Characteristics (Continued)

The following specifications apply for AGND=DGND=DGNDI/O=0V, VA=VD=+5.0VDC, VDI/O=+5.0 or +3.3VDC, VREF IN = +2.0VDC,

fMCLK=24MHz, Rs=25Ω. Boldface limits apply for TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. (Notes 7 & 8)

Symbol

Parameter

Conditions

Typical

(Note 9)

Limits

(Note 10)

Units

(Limits)

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