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WM8753LEB/V датащи(PDF) 34 Page - Wolfson Microelectronics plc |
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WM8753LEB/V датащи(HTML) 34 Page - Wolfson Microelectronics plc |
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34 / 87 page ![]() Advanced Information WM8753L w AI Rev 3.1 June 2004 34 PEAK LIMITER To prevent clipping when a large signal occurs just after a period of quiet, the ALC circuit includes a limiter function. If the ADC input signal exceeds 87.5% of full scale (–1.16dB), the PGA gain is ramped down at the maximum attack rate (as when ATK = 0000), until the signal level falls below 87.5% of full scale. This function is automatically enabled whenever the ALC is enabled. Note: 1. If ATK = 0000, then the limiter makes no difference to the operation of the ALC. It is designed to prevent clipping when long attack times are used. NOISE GATE When the signal is very quiet and consists mainly of noise, the ALC function may cause “noise pumping”, i.e. loud hissing noise during silence periods. The WM8753L has a noise gate function that prevents noise pumping by comparing the signal level at the LINPUT1/2/3 and/or RINPUT1/2/3 pins against a noise gate threshold, NGTH. The noise gate cuts in when: Signal level at ADC [dB] < NGTH [dB] + PGA gain [dB] + Mic Boost gain [dB] This is equivalent to: Signal level at input pin [dB] < NGTH [dB] The ADC output can then either be muted or alternatively, the PGA gain can be held constant (preventing it from ramping up as it normally would when the signal is quiet). The table below summarises the noise gate control register. The NGTH control bits set the noise gate threshold with respect to the ADC full-scale range. The threshold is adjusted in 1.5dB steps. Levels at the extremes of the range may cause inappropriate operation, so care should be taken with set–up of the function. Note that the noise gate only works in conjunction with the ALC function, and always operates on the same channel(s) as the ALC (left, right, both, or none). REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:3 NGTH [4:0] 00000 Noise gate threshold 00000 -76.5dBfs 00001 -75dBfs … 1.5 dB steps 11110 -31.5dBfs 11111 -30dBfs 1 NGG 0 Noise gate type 0 = PGA gain held constant 1 = mute ADC output R15 (0Fh) Noise Gate Control 0 NGAT 0 Noise gate function enable 1 = enable 0 = disable Table 22 Noise Gate Control 3D STEREO ENHANCEMENT The WM8753L has a digital 3D enhancement option to artificially increase the separation between the left and right channels. This effect can be used for recording or playback, but not for both simultaneously. Selection of 3D for record or playback is controlled by register bit MODE3D. Switching the 3D filter from record to playback or from playback to record may only be done when ADC and DAC are disabled. The WM8753L control interface will only allow MODE3D to be changed when ADC and DAC are disabled (ie ADCL = 0, ADCR = 0, DACL = 0 and DACR = 0). The 3D enhancement function is activated by the 3DEN bit, and has two programmable parameters. The DEPTH3D setting controls the degree of stereo expansion. Additionally, one of four filter characteristics can be selected for the 3D processing, using the 3DFILT control bits. |
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