WM8753LEBSLASHV datasheet(53/87 Pages) WOLFSON

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WM8753L

Advanced Information

AI Rev 3.1 June 2004

DIGITAL AUDIO INTERFACES

The WM8753L has two audio interfaces – a hi-fi audio interface and a voice audio interface. The hi-fi

audio interface is used for the input of data to the hi-fi DAC and may also be used to output data from

the stereo voice ADC. The voice audio interface is used for the input of data to the voice DAC and for

output of data from the voice ADC.

HI-FI AUDIO INTERFACE

The Hi-Fi audio interface has four pins:

•

ADCDAT: ADC data output

•

DACDAT: DAC data input

•

LRC: Data alignment clock

•

BCLK: Bit clock, for synchronisation

The clock signals BCLK, and LRC can be outputs when the WM8753L operates as a master, or

inputs when it is a slave (see Master and Salve Mode Operation, below).

Four different audio data formats are supported:

•

Left justified

•

Right justified

•

DSP mode

All four of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the

Electrical Characteristic section for timing information.

VOICE AUDIO INTERFACE

The voice audio interface has four pins:

•

VXDOUT: voice ADC data output

•

VXDIN: voice DAC data input

•

VXFS: data alignment clock or frame sync

•

VXCLK: Bit clock, for synchronisation

The clock signals VXCLK, and VXFS can be outputs when the WM8753L operates as a master, or

inputs when it is a slave (see Master and Slave Mode Operation, below). A mixed master/slave mode

is also supported where BCLK and VXCLK are outputs from the WM8753L but DACLRC, ADCLRC

and VXFS are inputs.

The same four audio modes are supported. The interface can also operate in mono mode where only

the left or right channel data is transferred. The DATASEL bits can be used to configure which of the

ADCs data is output.

MASTER AND SLAVE MODE OPERATION

The WM8753L audio interfaces may be individually configured as either master or slave interfaces.

As a master Hi-Fi interface device the WM8753L generates BCLK and LRC and thus controls

sequencing of the data transfer on ADCDAT and DACDAT. As a master voice interface device the

WM8753L generates VXCLK and VXFS and thus controls sequencing of the data transfer on VXDIN

and VXDOUT. In slave modes, the WM8753L responds with data to clocks it receives over the digital

audio interfaces. These modes can be selected by writing to the MS and PMS bits. With the interface

configured as a Master the LRC and VXFS outputs may be disabled and configured as inputs using

LRCOE and VXFSOE for an external frame sync from the controller to be input. In this mode the

generated LRC and VXFS must adhere to the timing requirements diagrams detailed in the Signal

Timing Requirements section on page 8. Master, slave and mixed modes are illustrated below.

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