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WM8753LEB/V датащи(PDF) 57 Page - Wolfson Microelectronics plc |
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WM8753LEB/V датащи(HTML) 57 Page - Wolfson Microelectronics plc |
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57 / 87 page ![]() WM8753L Advanced Information w AI Rev 3.1 June 2004 57 AUDIO INTERFACES CONTROL The register bits controlling audio format, word length and master / slave mode are summarised below. Each audio interface can be controlled individually. MS selects hi-fi audio interface operation in master or slave mode. In Master mode BCLK, and LRC are outputs. The frequency of LRC is set by the sample rate control bits SR[4:0] and USB. In Slave mode BCLK, and LRC are inputs. PMS selects voice audio interface operation in master or slave mode. In master mode VXCLK and VXFS are outputs. The frequency of VXFS is set by PSR. In slave mode VXCLK and VXFS are inputs. The frequency of BCLK and VXCLK may also be selected by the user under the control of BMODE[2:0] and PBMODE[2:0]. BCLK and VXCLK are divided down versions of master clock and in some settings of BMODE and PBMODE this may result in short BCLK and VXCLK pulses at the end of a frame due to a non-integer ratio of BCLKs or VXCLKS to LRC and VXFS. The WM8753 audio interfaces can be used together in the following modes, under the control of IFMODE[1:0]: 1. Voice Codec operating over Voice interface, with HiFi DAC operating over HiFi interface. 2. Voice Codec operating over HiFi interface, with HiFi DAC disabled. 3. Voice DAC disabled, with HiFi ADC and DAC over HiFi interface. 4. Voice DAC disabled, with HiFi ADC and DAC over HiFi interface, using VXFS as framing signal for ADC data, allowing different sample rates for ADC and DAC. Additionally each interface can operate in a partial master mode, where the bit clock (BCLK or VXCLK) is generated by the WM8753L, but the framing signal (LRC or VXFS) is derived externally. This mode of operation is selected by selecting Master Mode (by setting MS and/or PMS) and then setting LRCOE and/or VXFSOE to ‘0’ to select LRC and/or VXFS as inputs. In Slave mode (MS and PMS = 0) LRC and VXFS are always inputs. The HiFi DAC audio interface setup is controlled using WL[1:0], FORMAT[1:0] and BCLKINV. The Voice DAC and ADC audio interface setup is controlled using PWL[1:0], PFORMAT[1:0] and VXCLKINV. This allows flexibility in configuring the Voice DAC and ADC separately from the HiFi DAC. Table 50, Table 51 and Table 52 show the configuration for the different interface modes. 1. For Voice Codec and HiFi DAC mode (IFMODE[1:0] = 00) where the Voice DAC and ADC use the Voice interface the wordlength and format for the voice DAC and ADC are set by PWL[1:0] and PFORMAT[1:0]. The wordlength and format for the HiFi DAC using the HiFi interface are set by WL[1:0] and FORMAT[1:0]. 2. For Voice Codec on HiFi interface mode (IFMODE[1:0] = 01) where the Voice DAC and ADC use the HiFi interface the wordlength and format for the voice DAC and ADC are set by PWL[1:0] and PFORMAT[1:0]. 3. For HiFi Codec mode (IFMODE[1:0]=10) when the DAC and ADC both use the HiFi interface, the wordlength and format for the HiFi DAC are set by WL[1:0] and FORMAT[1:0] and the wordlength and format for the ADC are set by PWL[1:0] and PFORMAT[1:0]. In this mode ADC and DAC share the same BCLK and LRC but the format and wordlength for the ADC and DAC can be configured differently. 4. For HiFi Codec mode with ADC and DAC at different sample rates (IFMODE[1:0]=11) when the DAC uses LRC and BCLK and the ADC uses VXFA and BCLK , the wordlength and format for the HiFi DAC are set by WL[1:0] and FORMAT[1:0] and the wordlength and format for the ADC are set by PWL[1:0] and PFORMAT[1:0]. In this mode ADC and DAC share the same BCLK but the format and wordlength for the ADC and DAC can be configured differently. ADC data is usually output on either ADCDAT or VXDOUT. Under the control of ADCDOP, ADC data can be output on ADCDAT and VXDOUT at the same time. The data on ADCDAT and VXDOUT will be synchronous to either LRC and BCLK or VXFS and VXCLK as set by IFMODE[1:0]. |
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