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WM8737 датащи(PDF) 14 Page - Wolfson Microelectronics plc |
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WM8737 датащи(HTML) 14 Page - Wolfson Microelectronics plc |
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14 / 38 page ![]() WM8737L Preliminary Technical Data w AI Rev 3.0 May 2004 14 DEVICE DESCRIPTION INTRODUCTION The WM8737L is a low power analogue to digital converter (ADC) designed for audio recording. Its features, performance and low power consumption make it ideal for recordable CD players, MP3 players, portable MD players and PDAs. The device includes three stereo analogue inputs with a multiplexer to select between inputs. Each input can be used as either a line level input or as a microphone input with on-chip microphone pre- amplifiers. A programmable gain amplifier provides additional gain or attenuation, and can be used for automatic level control (ALC), keeping the recording volume constant. It is also possible to use the WM8737L as a mono device, or to mix the two channels to mono, either in the analogue or in the digital domain. The ADC is of a high quality using a multi-bit high-order oversampling architecture delivering high SNR at low power consumption. It can operate at oversampling rates of 64fs (low power mode) or 128fs (normal power mode), allowing users to design for low power consumption or high performance. The ADC also includes a digital high pass filter to remove unwanted DC components from the audio signal. This filter may be turned off for DC measurements. The output from the ADC is available on a configurable digital audio interface. It supports a number of audio data formats including I 2S, DSP Mode, Left justified and Right justified, and can operate in master or slave modes. The WM8737L master clock can be either an industry standard 256/384 fs clock or a 12MHz/24MHz USB clock. Sample rates of 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz, 88.2kHz and 96kHz can be generated directly from the master clock, without an external PLL. The digital filters are optimised for each sample rate. The WM8737L can be controlled through a 2 wire or 3 wire MPU control interface. It is fully compatible and an ideal partner for a range of industry standard microprocessors, controllers and DSPs. The design of the WM8737L has minimised power consumption without compromising performance. It can operate at very low voltages, can power off parts of the circuitry under software control and includes standby and power off modes. INPUT SIGNAL PATH The signal path consists of a multiplexer switch to select between three sets of analogue inputs, followed by a microphone boost preamplifier with selectable gain settings of 13dB, 18dB, 28dB and 33dB. The microphone preamplifier feeds into a PGA (programmable gain amplifier) via an external capacitor which removes dc offsets that could otherwise produce zipper noise when the PGA gain changes. Alternatively, for line input signals, the microphone preamplifier can be bypassed to reduce power consumption and noise. The PGA gain can be controlled either by the user or by the on-chip ALC function (see Automatic Level Control). The output signal from each PGA (left and right) enters an ADC where it is digitised. The two channels can also be mixed in the analogue domain and digitised in one ADC while the other ADC is switched off to reduce power consumption (see “Power Management” section). The mono-mix signal appears on both digital output channels. LEFT AND RIGHT CHANNEL SIGNAL INPUTS The WM8737L has two sets of low capacitance ac coupled analogue inputs, LINPUT1, LINPUT2, LINPUT3 and RINPUT1, RINPUT2, RINPUT3. The LINSEL and RINSEL control bits select between them. These inputs can be configured as microphone or line inputs by enabling or disabling the microphone preamplifier. All inputs have high impedance when the preamplifier is used and their impedance is between 1.8k Ω and 50kΩ (depending on PGA gain) if the preamplifier is bypassed. The signal inputs are internally high-impedance biased to the reference voltage, VREF. Whenever line inputs are muted or the device is placed into standby mode 2 (see “Power Management” section), the inputs stay biased to VREF. This reduces any audible clicks that may otherwise be heard when changing inputs or awakening from standby. |
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