AD9528BCPZ datasheet(43/68 Pages) AD

номер детали	AD9528BCPZ

подробное описание детали	Maximum output frequency

PDF	68 Pages

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производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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43 / 68 page

AD9528

Data Sheet

Rev. C | Page 42 of 67

Figure 52. Main Process, Initialization

WRITE:

START TIMEOUT CLOCK:

TIME = 0

CAL_COUNT = 0

0x508[1] = 1

TIMEOUT CLOCK:

TIME > PLL_TO1

TIMEOUT CLOCK:

TIME > PLL_TO2

CAL_COUNT > 1

ISSUE A PIN

LEVEL RESET

YES

RST_COUNT =

RST_COUNT + 1

APPLY VDD

(ALL DOMAINS)

START

VDD SETTLED?

APPLY REFERENCE

INPUT (s)

SUB-PROCESS:

WRITE

REGISTERS FROM

SETUP FILE

SUB-PROCESS:

ISSUE VCO

CALIBRATION

POR: WAIT 60ms

CAL_COUNT =

CAL_COUNT + 1

RST_COUNT > 0

RAISE FLAG FOR

DEBUGGING!

READ:

R0x508 –R0x509

START TIMEOUT CLOCK:

TIME = 0

1PLL1_TO IS A CALCULATED VALUE TIME OUT VALUE. PLEASE SEE THEORY OF OPERATION–COMPONENT BLOCKS–PLL1 FOR ITS FORMULA.

2PLL2_TO IS A CALCULATED VALUE TIME OUT VALUE. PLEASE SEE THEORY OF OPERATION–COMPONENT BLOCKS–PLL2 FOR ITS FORMULA.

YES

END

RST_COUNT = 0

YES

PLL1 LOCK

DETECT

POLLING LOOP

PLL2 LOCK

DETECT POLLING

LOOP

PLL2 RECALIBRATION LOOP

CHIP LEVEL RESET LOOP

USER POWER

SUPPLIES

INITIALIZATION AND

POWER-ON RESET

WAIT

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