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MB91F467DA датащи(PDF) 40 Page - Cypress Semiconductor

номер детали MB91F467DA
подробное описание детали  32-bit RISC, load/store architecture, five-stage pipeline
PDF  137 Pages
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производитель  CYPRESS [Cypress Semiconductor]
домашняя страница  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB91F467DA датащи(HTML) 40 Page - Cypress Semiconductor

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Document Number: 002-04613 Rev. *A
Page 40 of 137
MB91460D Series
9.6.3 Security Vector FSV2
The setting of the Flash Security Vector FSV2 bits [31:0] is responsible for the individual write protection of the 64 Kbytes sectors. It
is only evaluated if write protection bit FSV1 [17] is set.
Explanation of the bits in the Flash Security Vector FSV2[31:0]
Note : See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash Memory.
FSV2 bit
Sector
Enable Write Pro-
tection
Disable Write Pro-
tection
Comment
FSV2[0]
SA8 (MB91F467Dx)
set to “0”
set to “1”
FSV2[1]
SA9 (MB91F467Dx)
set to “0”
set to “1”
FSV2[2]
SA10 (MB91F467Dx)
set to “0”
set to “1”
FSV2[3]
SA11 (MB91F467Dx)
set to “0”
set to “1”
FSV2[4]
SA12
set to “0”
set to “1”
FSV2[5]
SA13
set to “0”
set to “1”
FSV2[6]
SA14
set to “0”
set to “1”
FSV2[7]
SA15
set to “0”
set to “1”
FSV2[8]
SA16
set to “0”
set to “1”
FSV2[9]
SA17
set to “0”
set to “1”
FSV2[10]
SA18
set to “0”
set to “1”
FSV2[11]
SA19
set to “0”
set to “1”
FSV2[12]
SA20 (MB91F467Dx)
set to “0”
set to “1”
FSV2[13]
SA21 (MB91F467Dx)
set to “0”
set to “1”
FSV2[14]
SA22 (MB91F467Dx)
set to “0”
set to “1”
FSV2[15]
SA23 (MB91F467Dx)
set to “0”
set to “1”
FSV2[31:16]
—
set to “0”
set to “1”
not available



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