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MB91F467DA датащи(PDF) 39 Page - Cypress Semiconductor

номер детали MB91F467DA
подробное описание детали  32-bit RISC, load/store architecture, five-stage pipeline
PDF  137 Pages
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производитель  CYPRESS [Cypress Semiconductor]
домашняя страница  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB91F467DA датащи(HTML) 39 Page - Cypress Semiconductor

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Document Number: 002-04613 Rev. *A
Page 39 of 137
MB91460D Series
FSV1 (bit15 to bit0)
The setting of the Flash Security Vector FSV1 bits [15:0] is responsible for the individual write protection of the 8 Kbytes sectors. It is
only evaluated if write protection bit FSV1[17] is set.
Explanation of the bits in the Flash Security Vector FSV1 [15:0]
Note : It is mandatory to always set the sector where the Flash Security Vectors FSV1 and FSV2 are located to write protected (here
sector SA4). Otherwise it is possible to overwrite the Security Vector to a setting where it is possible to either read out the
Flash content or manipulate data by writing.
See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash Memor
y.
FSV1 bit
Sector
Enable Write Pro-
tection
Disable Write Pro-
tection
Comment
FSV1[0]
SA0 (MB91F467Dx)
set to “0”
set to “1”
FSV1[1]
SA1 (MB91F467Dx)
set to “0”
set to “1”
FSV1[2]
SA2 (MB91F467Dx)
set to “0”
set to “1”
FSV1[3]
SA3 (MB91F467Dx)
set to “0”
set to “1”
FSV1[4]
SA4
set to “0”
Write protection is mandatory!
FSV1[5]
SA5
set to “0”
set to “1”
FSV1[6]
SA6
set to “0”
set to “1”
FSV1[7]
SA7
set to “0”
set to “1”
FSV1[8]
set to “0”
set to “1”
not available
FSV1[9]
set to “0”
set to “1”
not available
FSV1[10]
set to “0”
set to “1”
not available
FSV1[11]
set to “0”
set to “1”
not available
FSV1[12]
set to “0”
set to “1”
not available
FSV1[13]
set to “0”
set to “1”
not available
FSV1[14]
set to “0”
set to “1”
not available
FSV1[15]
set to “0”
set to “1”
not available



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