MCP19124 datasheet(89/236 Pages) MICROCHIP

89 / 236 page

 2016 Microchip Technology Inc.

DS20005619A-page 89

MCP19124/5

12.8

Power Control (PCON) Register

The Power Control (PCON) register contains flag bits

to differentiate between a:

• Power-On Reset (POR)

• Brown-Out Reset (BOR)

The PCON register bits are shown in Register 12-1.

PCON: POWER CONTROL REGISTER

R/W-0

U-0

R/W-0

ADC_REFR

—

VDDFLAG

VDDOK

POR

BOR

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’

= Bit is set

‘0’

= Bit is cleared

x = Bit is unknown

bit 7

ADC_REFR: VDD >AVDD Status bit that shows if the ADC Reference is present at the ADC

=VDD is greater than AVDD and the ADC Reference is present at the ADC

=VDD is not greater than AVDD and the ADC Reference is not present at the ADC

bit 6-4

Unimplemented: Read as '0'

bit 3

VDDFLAG: VDDOK history status bit

=VDD LDO has not dropped out of regulation (VDDOK has not gone low since this bit was last set)

=VDD LDO has dropped out of regulation at some time since this bit was last set. Must be set by

firmware when VDDOK = 1

bit 2

VDDOK: VDD Status bit

=VDD is in regulation

=VDD is not in regulation

bit 1

POR: Power-On Reset Status bit

= No Power-On Reset occurred

= A Power-On Reset occurred (must be set in software after a Power-On Reset occurs)

bit 0

BOR: Brown-Out Reset bit

= No Brown-Out Reset occurred

= A Brown-Out Reset occurred (must be set in software after a Brown-Out Reset occurs)

TABLE 12-5:

SUMMARY OF REGISTERS ASSOCIATED WITH RESETS (Note 1)

Name

Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0

on Page

PCON

—

—POR

BOR

STATUS

IPR

RP1

RP0

ZDC

Legend: — = unimplemented bit, read as ‘0’. Shaded cells are not used by Resets.

Note 1: Other (non power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.

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