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ML7344CE датащи(PDF) 52 Page - LAPIS Semiconductor Co., Ltd.

номер детали ML7344CE
подробное описание детали  Sub-GHz(160MHz to 510MHz) band short range wireless transceiver IC
PDF  154 Pages
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производитель  LAPIS [LAPIS Semiconductor Co., Ltd.]
домашняя страница  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

ML7344CE датащи(HTML) 52 Page - LAPIS Semiconductor Co., Ltd.

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ii) Data output mode 1 (to host)
Set RXDIO_CTRL[1:0] ([DIO_SET: B0 0x0C(7-6)]) =0b10.
After SyncWord detection, RX data is buffered in RX_FIFO. RX data buffering will continue until RX sync
signal (SYNC) becomes ”L”. By setting DIO_START ([DIO_SET: B0 0x0C(0)])=0b1, top data of buffered
data will be output through DIO interface (DIO/DCLK). (RX data is output at falling edge of DCLK).
However, if DIO_START setting is done after 64 byte timing, the top byte will be over written. If all buffered
data is output until SYNC becomes ”L”, RX completion interrupt (INT[8] group 2) will be generated. After
RX completion, ready to receive next packet.
NOTE:
1.
RX data buffering in RX_FIFO is accessed byte by byte. DIO_START should be issued after 1 byte
access cycle upon SyncWord detection.
2.
This mode does not process L-field. Field checking function is not supported.
DIO(GPIO0-3,EXT_CLK)
RX_ON
RX_ON
command
RX data
DCLK(GPIO0-3,EXT_CLK)
TRX_OFF
command
Buffering to RX_FIFO
RX sync signal
Preamble
SyncWord
Data-field
DIO_START =0b1



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