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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ML7344CE датащи(PDF) 29 Page - LAPIS Semiconductor Co., Ltd. |
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ML7344CE датащи(HTML) 29 Page - LAPIS Semiconductor Co., Ltd. |
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29 / 154 page  FEDL7344C/E/J-05 ML7344C/E/J 29/154 ●SLEEP setting Deep SLEEP mode: Powers for all blocks except for IO pins are turned off. SLEEP mode: Main regulator and 26MHz oscillation circuits are turned off. But sub-regulator is turned-on. The following registers can be programmed to control SLEEP state Function Control bit name Power control PDN_EN([SLEEP?WU_SET:B0 0x2D(1)]) Wake-up setting WAKEUP_EN([SLEEP/WU_SET:B0 0x2D(4)]) Wake-up timer clock source setting WUT_CLK_SOURCE([SLEEP/WU_SET:B0 0x2D(2)]) Internal RC oscillator control RC32K_EN([CLK_SET2:B0 0x03(3)]) Setting method and internal state for DEEP_SLEEP and various SLEEP modes are as follows: SLEEP mode Setting method DEEP_SLEEP RESETN pin=”L” REGPDIN pin=”H” OFF OFF OFF OFF OFF OFF SLEEP1 [SLEEP/WU_SET: B0 0x2D(4-0)] = 0b0_1011 (*2) [CLK_SET2: B0 0x03(3)] = 0b0 (default) OFF ON OFF OFF OFF OFF SLEEP2 [SLEEP/WU_SET: B0 0x2D(4-0)] = 0b0_1001 (*2) [CLK_SET2: B0 0x03(3)] = 0b0 (default) OFF ON OFF OFF (*1) OFF ON SLEEP3 [SLEEP/WU_SET: B0 0x2D(4-0)] = 0b1_1001 (*2) [CLK_SET2: B0 0x03(3)] = 0b0 (default) OFF ON OFF OFF ON ON SLEEP4 [SLEEP/WU_SET: B0 0x2D(4-0)] = 0b1_1101 (*2) [CLK_SET2: B0 0x03(3)] = 0b1 OFF ON OFF ON ON ON (*1) Low speed clock is supplied from EXT_CLK pin. (*2) Please set proper value to [SLEEP/WU_SET: B0 0x2D(3)]. NOTE: Contents of registers are not kept during DEEP_SLEEP. Contents of registers are kept during SLEEP1, SLEEP2, SLEEP3 and SLEEP4. However, in SLEEP1 mode, contents of TX FIFO and RX FIFO are not kept, because power to FIFO is turned off. |
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