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UCD3138ARMHT датащи(PDF) 50 Page - Texas Instruments |
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UCD3138ARMHT датащи(HTML) 50 Page - Texas Instruments |
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50 / 87 page ![]() EXT CAP AD02 400 Digital RSHARE 250 3.3 V ISHARE ADC12 and CMP ESD ESD 250 3. 2 k ESD AD13 3.3V SW2 SW1 SW3 3.3 V ADC12 and CMP 50 UCD3138A SLUSC66C – MARCH 2015 – REVISED SEPTEMBER 2016 www.ti.com Submit Documentation Feedback Product Folder Links: UCD3138A Detailed Description Copyright © 2015–2016, Texas Instruments Incorporated The simplified current sharing circuitry is shown in the drawing below: Figure 7-16. Simplified Current Sharing Circuitry CURRENT SHARING MODE FOR TEST ONLY, ALWAYS KEEP 00 CS_MODE EN_SW1 EN_SW2 DPWM Off or Slave Mode (3-state) 00 00 (default) 0 0 0 PWM Bus 00 01 1 0 ACTIVE Off or Slave Mode (3-state) 00 10 0 0 0 Analog Bus or Master 00 11 0 1 0 The period and the duty of 8-bit PWM current source and the state of the SW1 and SW2 switches can be controlled through the current sharing control register (CSCTRL). 7.5.13 Temperature Reference The temperature reference register (TEMPREF) provides the ADC12 count when ADC12 measures the internal temperature sensor (channel 14) during the factory trim and calibration. This information can be used by different periodic temperature compensation routines implemented in the firmware. But it should not be overwritten by firmware, otherwise this factory written value is lost. 7.1 Device Functional Modes The DPWM is a complex logic system which is highly configurable to support several different power supply topologies. This section discusses waveforms, timing, and register settings, rather than ON-logic design. The DPWM functions using a period counter, which increments from 0 to PRD, then resets and begins to increment again. The DPWM logic causes transitions in many digital signals when the period counter reaches the target value for that signal. |
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