Datasheet

3

Octal E1 Line Interface Unit — LXT381

Contents

1.0

Pin Assignments and Signal Descriptions......................................................5

2.0

Functional Description...........................................................................................13

2.1

Receiver .............................................................................................................. 13

2.1.1

Loss Of Signal Detector ......................................................................... 13

2.2

Transmitter .......................................................................................................... 13

2.2.1

Transmit Pulse Shaping ......................................................................... 14

2.3

Interfacing with 5V logic ...................................................................................... 14

2.4

Line Protection .................................................................................................... 14

2.5

Loopbacks ........................................................................................................... 14

2.5.1

Analog Loopback.................................................................................... 15

2.5.2

Remote Loopback ..................................................................................15

2.6

Hitless Protection Switching (HPS) .....................................................................15

3.0

JTAG Boundary Scan .............................................................................................18

3.1

Overview ............................................................................................................. 18

3.2

Architecture ......................................................................................................... 18

3.2.1

TAP Controller........................................................................................ 19

3.3

JTAG Register Description..................................................................................20

3.3.1

Boundary Scan Register (BSR).............................................................. 21

3.3.2

Device Identification Register (IDR) ....................................................... 24

3.3.3

Bypass Register (BYR) .......................................................................... 24

3.3.4

Analog Port Scan Register (ASR) .......................................................... 24

3.3.5

Instruction Register (IR) ......................................................................... 25

4.0

Test Specifications ..................................................................................................27

5.0

Mechanical Specifications....................................................................................34