LXT381 — Octal E1 Line Interface

10

Datasheet

78

M14

RCLK2

DO

Receive Clock Output.

79

80

L12

L13

TNEG2

TPOS2

DI

DI

Transmit Negative Data Input.

Transmit Positive Data Input.

81

L14

TCLK2

DI

Transmit Clock Input.

82

K13

NC

NC

Not Connected. This pin must be left open for normal operation.

83

K14

NC

NC

Not Connected. This pin must be left open for normal operation.

84

J11

GND

S

Ground. This pin must be connected to Ground.

85

J12

GND

S

Ground. This pin must be connected to Ground.

86

J13

GND

S

Ground. This pin must be connected to Ground.

87

J14

GND

S

Ground. This pin must be connected to Ground.

88

H12

GND

S

Ground. This pin must be connected to Ground.

89

H11

GND1

S

Ground (Core).

90

H14

VCC1

S

Power (Core).

91

G11

GNDIO1

S

Ground (I/O).

92

G14

VCCIO1

S

Power (I/O).

93

G13

AT2

AO

JTAG Analog Output Test Port 2.

94

H13

AT1

AI

JTAG Analog Input Test Port 1.

95

G12

TRST

DI

JTAG Controller Reset Input. Input is used to reset JTAG controller.

TRST is pulled up internally and may be left disconnected.

96

F11

TMS

DI

JTAG Test Mode Select Input. Used to control the test logic state

machine. Sampled on rising edge of TCK. TMS is pulled up internally and

may be left disconnected.

97

F14

TCK

DI

JTAG Clock Input. Clock input for JTAG. Connect to GND when not used.

98

F13

TDO

DO

JTAG Data Output. Test Data Output for JTAG. Used for reading all serial

configuration and test data from internal test logic. Updated on falling edge

of TCK.

99

F12

TDI

DI

JTAG Data Input. Test Data input for JTAG. Used for loading serial

instructions and data into internal test logic. Sampled on rising edge of

TCK. TDI is pulled up internally and may be left disconnected.

100

D14

TCLK5

DI

Transmit Clock Input.

101

102

D13

D12

TPOS5

TNEG5

DI

DI

Transmit Positive Data Input.

Transmit Negative Data Input.

103

C14

RCLK5

DO

Receive Clock Output.

104

105

C13

C12

RPOS5

RNEG5

DO

DO

Receive Positive Data Output.

Receive Negative Data Output.

106

E12

ALOS5

DO

Analog Loss of Signal Output.

107

B14

TCLK4

DI

Transmit Clock Input.

Table 1.

LXT381 Pin Description (Continued)

Pin #

LQFP

Pin #

PBGA

Symbol

Description

1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;

N.C.: Not

Connected.