Octal E1 Line Interface — LXT381

Datasheet

19

3.2.1

TAP Controller

The TAP controller is a 16 state synchronous state machine controlled by the TMS input and

clocked by TCK. See Figure 7. The TAP controls whether the LXT381 is in reset mode, receiving

an instruction, receiving data, transmitting data or in an idle state. Table 3 describes in detail each

of the states represented in Figure 7.

Table 3.

TAP State Description

State

Description

Test logic reset

In this state the test logic is disabled. The device is set to normal operation mode. While in this state, the

instruction register is set to the ICODE instruction.

Run -test/idle

The TAP controller stays in this state as long as TMS is low. Used to perform tests.

Capture - DR

The Boundary Scan Data Register (BSR) is loaded with input pin data.

Shift - DR

Shifts the selected test data registers by one stage toward its serial output.

Update - DR

Data is latched into the parallel output of the BSR when selected.

Capture - IR

Used to load the instruction register with a fixed instruction.

Shift - IR

Shifts the instruction register by one stage.

Update - IR

Loads a new instruction into the instruction register.

Pause - IR

Pause - DR

Momentarily pauses shifting of data through the data/instruction registers.

Exit1 - IR

Exit1 - DR

Exit2 - IR

Exit2 - DR

Temporary states that can be used to terminate the scanning process.