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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SI5341 датащи(PDF) 7 Page - Silicon Laboratories |
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SI5341 датащи(HTML) 7 Page - Silicon Laboratories |
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7 / 53 page  3.3.2 Input Clocks (IN0, IN1, IN2) A differential or single-ended clock can be applied at IN2, IN1, or IN0. The recommended input termination schemes are shown in the figure below. Pulsed CMOS DC Coupled Single Ended Standard AC Coupled Single Ended 100 3.3V, 2.5V, 1.8V LVCMOS Standard AC Coupled Differential LVPECL INx INxb 50 100 Standard AC Coupled Differential LVDS INx INxb 3.3V, 2.5V LVPECL 3.3V, 2.5V LVDS or CML INx INxb INx INxb 50 50 50 50 Pulsed CMOS Standard Si5341/40 Si5341/40 Si5341/40 Si5341/40 3.3V, 2.5V, 1.8V LVCMOS 50 R 2 R1 Pulsed CMOS Standard Pulsed CMOS Standard Pulsed CMOS Standard VDD R1 (Ohm) R2 (Ohm) 1.8 V 2.5 V 3.3 V 324 511 634 665 475 365 Figure 3.3. Termination of Differential and LVCMOS Input Signals Si5341/40 Rev D Data Sheet Functional Description silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 6 |
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